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Author	SHA1	Message	Date
Xi Ruoyao	f09a9dd319	LoongArch: Don't falsely claim gold supported in toplevel configure ... The gold linker has never been ported to LoongArch (and it seems unlikely to be ported in the future as the new architectures are focusing on lld and/or mold for fast linkers). ChangeLog: * configure.ac (ENABLE_GOLD): Remove loongarch*-*-* from target list. * configure: Regenerate.	2024-02-23 18:13:25 +08:00
Richard Biener	bff1cbf2f6	Add ia64*-*-* to the list of obsolete targets ... The following deprecates ia64*-*-* for GCC 14. Since we plan to force LRA for GCC 15 and the target only has slim chances of getting updated this notifies people in advance. Given both Linux and glibc have axed the target further development is also made difficult. There is no listed maintainer for ia64 either. PR target/90785 gcc/ * config.gcc: Add ia64*-*-* to the list of obsoleted targets. contrib/ * config-list.mk (LIST): --enable-obsolete for ia64*-*-*.	2024-02-23 10:45:31 +01:00
Rainer Orth	818094a07a	testsuite: vect: Actually skip gcc.dg/vect/vect-bic-bitmask-12.c etc. on SPARC ... gcc.dg/vect/vect-bic-bitmask-12.c and gcc.dg/vect/vect-bic-bitmask-23.c currently FAIL on 32 and 64-bit Solaris/SPARC FAIL: gcc.dg/vect/vect-bic-bitmask-12.c -flto -ffat-lto-objects scan-tree-dump dce7 "<=\\\\s*.+{ 255,.+}" FAIL: gcc.dg/vect/vect-bic-bitmask-12.c scan-tree-dump dce7 "<=\\\\s*.+{ 255,.+}" FAIL: gcc.dg/vect/vect-bic-bitmask-23.c -flto -ffat-lto-objects scan-tree-dump dce7 "<=\\\\s*.+{ 255, 15, 1, 65535 }" FAIL: gcc.dg/vect/vect-bic-bitmask-23.c scan-tree-dump dce7 "<=\\\\s*.+{ 255, 15, 1, 65535 }" although they should be skipped since commit 5f07095d22 Author: Tamar Christina <tamar.christina@arm.com> Date: Tue Mar 8 11:32:59 2022 +0000 vect: disable bitmask tests on sparc The problem is that dg-skip-if must come after dg-do, although this isn't currently documented unfortunately. Fixed by reordering the directives. Tested on sparc-sun-solaris2.11 and i386-pc-solaris2.11. 2024-02-22 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> gcc/testsuite: * gcc.dg/vect/vect-bic-bitmask-12.c: Move dg-skip-if down. * gcc.dg/vect/vect-bic-bitmask-23.c: Likewise.	2024-02-23 10:14:31 +01:00
Rainer Orth	6837c45037	testsuite: plugin: Fix gcc.dg/plugin/crash-test-write-though-null-sarif.c on Solaris ... gcc.dg/plugin/crash-test-write-though-null-sarif.c FAILs on Solaris: FAIL: gcc.dg/plugin/crash-test-write-though-null-sarif.c -fplugin=./crash_test_plugin.so scan-sarif-file "text": "Segmentation fault Comparing the sarif files between Linux and Solaris reveals - "message": {"text": "Segmentation fault"}, + "message": {"text": "Segmentation Fault"}, This patch allows for both forms. Tested on i386-pc-solaris2.11, sparc-sun-solaris2.11, and x86_64-pc-linux-gnu. 2024-02-22 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> gcc/testsuite: * gcc.dg/plugin/crash-test-write-though-null-sarif.c (scan-sarif-file): Allow for "Segmentation Fault", too.	2024-02-23 10:06:41 +01:00
Monk Chiang	eb7a8f213d	Add myself to write after approval ... ChangeLog: * MAINTAINERS: Add myself.	2024-02-23 15:48:56 +08:00
Palmer Dabbelt	23f5da91cc	RISC-V: Point our Python scripts at python3 ... This builds for me, and I frequently have python-is-python3 type packages installed so I think I've been implicitly testing it for a while. Looks like Kito's tested similar configurations, and the bugzilla indicates we should be moving over. gcc/ChangeLog: PR other/109668 * config/riscv/arch-canonicalize: Move to python3 * config/riscv/multilib-generator: Likewise	2024-02-23 12:36:07 +08:00
Palmer Dabbelt	1c5da882bf	doc: RISC-V: Document that -mcpu doesn't override -march or -mtune ... This came up recently as Edwin was looking through the test suite. A few of us were talking about this during the patchwork meeting and were surprised. Looks like this is the desired behavior, so let's at least document it. gcc/ChangeLog: * doc/invoke.texi: Document -mcpu. Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>	2024-02-23 12:26:47 +08:00
Lulu Cheng	33abf74108	LoongArch: When checking whether the assembler supports conditional branch relaxation, add compilation parameter "--fatal-warnings" to the assembler. ... In binutils 2.40 and earlier versions, only a warning will be reported when a relocation immediate value is out of bounds. As a result, the value of the macro HAVE_AS_COND_BRANCH_RELAXATION will also be defined as 1 when the assembler does not support conditional branch relaxation. Therefore, add the compilation option "--fatal-warnings" to avoid this problem. gcc/ChangeLog: * configure: Regenerate. * configure.ac: Add parameter "--fatal-warnings" to assemble when checking whether the assemble support conditional branch relaxation.	2024-02-23 11:18:40 +08:00
GCC Administrator	77de8b722d	Daily bump.	2024-02-23 00:16:46 +00:00
Marek Polacek	d34d7c74d5	testsuite: fix Wmismatched-new-delete-8.C with -m32 ... This fixes error: 'operator new' takes type 'size_t' ('unsigned int') as first parameter [-fpermissive] gcc/testsuite/ChangeLog: * g++.dg/warn/Wmismatched-new-delete-8.C: Use __SIZE_TYPE__.	2024-02-22 18:53:48 -05:00
Jakub Jelinek	37127ed975	c: Handle scoped attributes in __has*attribute and scoped attribute parsing changes in -std=c11 etc. modes [PR114007] ... We aren't able to parse __has_attribute (vendor::attr) (and __has_c_attribute and __has_cpp_attribute) in strict C < C23 modes. While in -std=gnu* modes or in -std=c23 there is CPP_SCOPE token, in -std=c* (except for -std=c23) there are is just a pair of CPP_COLON tokens. The c-lex.cc hunk adds support for that. That leads to a question if we should return 1 or 0 from __has_attribute (gnu::unused) or not, because while [[gnu::unused]] is parsed fine in -std=gnu*/-std=c23 modes (sure, with pedwarn for < C23), we do not parse it at all in -std=c* (except for -std=c23), we only parse [[__extension__ gnu::unused]] there. While the __extension__ in there helps to avoid the pedwarn, I think it is better to be consistent between GNU and strict C < C23 modes and parse [[gnu::unused]] too; on the other side, I think parsing [[__extension__ gnu : : unused]] is too weird and undesirable. So, the following patch adds a flag during preprocessing at the point where we normally create CPP_SCOPE tokens out of 2 consecutive colons on the first CPP_COLON to mark the consecutive case (as we are tight on the bits, I've reused the PURE_ZERO flag, which is used just by the C++ FE and only ever set (both C and C++) on CPP_NUMBER tokens, this new flag has the same value and is only ever used on CPP_COLON tokens) and instead of checking loose_scope_p argument (i.e. whether it is [[__extension__ ...]] or not), it just parses CPP_SCOPE or CPP_COLON with CLONE_SCOPE flag followed by another CPP_COLON the same. The latter will never appear in >= C23 or -std=gnu* modes, though guarding its use say with flag_iso && !flag_isoc23 && doesn't really work because the __extension__ case temporarily clears flag_iso flag. This makes the -std=c11 etc. behavior more similar to -std=gnu11 or -std=c23, the only difference I'm aware of are the #define JOIN2(A, B) A##B [[vendor JOIN2(:,:) attr]] [[__extension__ vendor JOIN2(:,:) attr]] cases, which are accepted in the latter modes, but results in error in -std=c11; but the error is during preprocessing that :: doesn't form a valid preprocessing token, which is true, so just don't do that if you try to have __STRICT_ANSI__ && __STDC_VERSION__ <= 201710L compatibility. 2024-02-22 Jakub Jelinek <jakub@redhat.com> PR c/114007 gcc/ * doc/extend.texi: (__extension__): Remove comments about scope tokens vs. two colons. gcc/c-family/ * c-lex.cc (c_common_has_attribute): Parse 2 CPP_COLONs with the first one with COLON_SCOPE flag the same as CPP_SCOPE. gcc/c/ * c-parser.cc (c_parser_std_attribute): Remove loose_scope_p argument. Instead of checking it, parse 2 CPP_COLONs with the first one with COLON_SCOPE flag the same as CPP_SCOPE. (c_parser_std_attribute_list): Remove loose_scope_p argument, don't pass it to c_parser_std_attribute. (c_parser_std_attribute_specifier): Adjust c_parser_std_attribute_list caller. gcc/testsuite/ * gcc.dg/c23-attr-syntax-6.c: Adjust testcase for :: being valid even in -std=c11 even without __extension__ and : : etc. not being valid anymore even with __extension__. * gcc.dg/c23-attr-syntax-7.c: Likewise. * gcc.dg/c23-attr-syntax-8.c: New test. libcpp/ * include/cpplib.h (COLON_SCOPE): Define to PURE_ZERO. * lex.cc (_cpp_lex_direct): When lexing CPP_COLON with another colon after it, if !CPP_OPTION (pfile, scope) set COLON_SCOPE flag on the first CPP_COLON token.	2024-02-22 19:32:02 +01:00
Andrew Pinski	1076ffda6c	warn-access: Fix handling of unnamed types [PR109804] ... This looks like an oversight of handling DEMANGLE_COMPONENT_UNNAMED_TYPE. DEMANGLE_COMPONENT_UNNAMED_TYPE only has the u.s_number.number set while the code expected newc.u.s_binary.left would be valid. So this treats DEMANGLE_COMPONENT_UNNAMED_TYPE like we treat function paramaters (DEMANGLE_COMPONENT_FUNCTION_PARAM) and template paramaters (DEMANGLE_COMPONENT_TEMPLATE_PARAM). Note the code in the demangler does this when it sets DEMANGLE_COMPONENT_UNNAMED_TYPE: ret->type = DEMANGLE_COMPONENT_UNNAMED_TYPE; ret->u.s_number.number = num; Committed as obvious after bootstrap/test on x86_64-linux-gnu PR tree-optimization/109804 gcc/ChangeLog: * gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle DEMANGLE_COMPONENT_UNNAMED_TYPE. gcc/testsuite/ChangeLog: * g++.dg/warn/Wmismatched-new-delete-8.C: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>	2024-02-22 09:28:39 -08:00
Tamar Christina	7d8585c0c0	AArch64: update vget_set_lane_1.c test output ... In the vget_set_lane_1.c test the following entries now generate a zip1 instead of an INS BUILD_TEST (float32x2_t, float32x2_t, , , f32, 1, 0) BUILD_TEST (int32x2_t, int32x2_t, , , s32, 1, 0) BUILD_TEST (uint32x2_t, uint32x2_t, , , u32, 1, 0) This is because the non-Q variant for indices 0 and 1 are just shuffling values. There is no perf difference between INS SIMD to SIMD and ZIP on Arm uArches but preferring the INS alternative has a drawback on all uArches as ZIP being a three operand instruction can be used to tie the result to the return register whereas INS would require an fmov. As such just update the test file for now. gcc/testsuite/ChangeLog: PR target/112375 * gcc.target/aarch64/vget_set_lane_1.c: Update test output.	2024-02-22 15:32:08 +00:00
Gaius Mulley	c1667b1ef5	PR modula2/114055 improve error message when checking the BY constant ... The fix marks a constant created during the default BY clause of the FOR loop as internal. The type checker will always return true if checking against an internal const. gcc/m2/ChangeLog: PR modula2/114055 * gm2-compiler/M2Check.mod (Import): IsConstLitInternal and IsConstLit. (isInternal): New procedure function. (doCheck): Test for isInternal in either operand and early return true. * gm2-compiler/M2Quads.mod (PushOne): Rewrite with extra parameter internal. (BuildPseudoBy): Add TRUE parameter to PushOne call. (BuildIncProcedure): Add FALSE parameter to PushOne call. (BuildDecProcedure): Add FALSE parameter to PushOne call. * gm2-compiler/M2Range.mod (ForLoopBeginTypeCompatible): Uncomment code and tidy up error string. * gm2-compiler/SymbolTable.def (PutConstLitInternal): New procedure. (IsConstLitInternal): New procedure function. * gm2-compiler/SymbolTable.mod (PutConstLitInternal): New procedure. (IsConstLitInternal): New procedure function. (SymConstLit): New field IsInternal. (CreateConstLit): Initialize IsInternal to FALSE. gcc/testsuite/ChangeLog: PR modula2/114055 * gm2/pim/fail/forloopby.mod: New test. * gm2/pim/pass/forloopby2.mod: New test. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>	2024-02-22 15:02:19 +00:00
Richard Biener	92c4029799	tree-optimization/114048 - ICE in copy_reference_ops_from_ref ... The following adds another omission to the assert verifying we're not running into spurious off == -1. PR tree-optimization/114048 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): MEM_REF can also produce -1 off. * gcc.dg/torture/pr114048.c: New testcase.	2024-02-22 15:47:38 +01:00
Richard Biener	549f251f05	tree-optimization/114027 - conditional reduction chain ... When we classify a conditional reduction chain as CONST_COND_REDUCTION we fail to verify all involved conditionals have the same constant. That's a quite unlikely situation so the following simply disables such classification when there's more than one reduction statement. PR tree-optimization/114027 * tree-vect-loop.cc (vecctorizable_reduction): Use optimized condition reduction classification only for single-element chains. * gcc.dg/vect/pr114027.c: New testcase.	2024-02-22 13:13:48 +01:00
Jakub Jelinek	a0782531b8	profile-count: Don't dump through a temporary buffer [PR111960] ... The profile_count::dump (char *, struct function * = NULL) const; method has a single caller, the profile_count::dump (FILE *f, struct function *fun) const; method and for that going through a temporary buffer is just slower and opens doors for buffer overflows, which is exactly why this P1 was filed. The buffer size is 64 bytes, the previous maximum "%" PRId64 " (%s)" would print up to 61 bytes in there (19 bytes for arbitrary uint64_t:61 bitfield printed as signed, "estimated locally, globally 0 adjusted" i.e. 38 bytes longest %s and 4 other characters). Now, after the r14-2389 changes, it can be 19 + 38 plus 11 other characters + %.4f, which is worst case 309 chars before decimal point, decimal point and 4 digits after it, so total 382 bytes. So, either we could bump the buffer[64] to buffer[400], or the following patch just drops the indirection through buffer and prints it directly to stream. After all, having APIs which fill in some buffer without passing down the size of the buffer is just asking for buffer overflows over time. 2024-02-22 Jakub Jelinek <jakub@redhat.com> PR ipa/111960 * profile-count.h (profile_count::dump): Remove overload with char * first argument. * profile-count.cc (profile_count::dump): Change overload with char * first argument which uses sprintf into the overfload with FILE * first argument and use fprintf instead. Remove overload which wrapped it.	2024-02-22 13:07:25 +01:00
Jakub Jelinek	7ed800c9c9	call-cdce: Add missing BUILT_IN_*F{32,64}X handling and improve BUILT_IN_*L [PR113993] ... The following testcase ICEs, because can_test_argument_range returns true for BUILT_IN_{COSH,SINH,EXP{,M1,2}}{F32X,F64X} among many other builtins, but get_no_error_domain doesn't handle those. float32x_type_node when supported in GCC always has DFmode, so that case is easy (and call-cdce assumes that SFmode is IEEE float and DFmode is IEEE double). So *F32X is simply handled by adding those cases next to *F64. float64x_type_node when supported in GCC by definition has a mode with larger precision and exponent range than DFmode, so it can be XFmode, TFmode or KFmode. I went through all the l/f128 suffixed builtins and verified that the float128x_type_node no error domain range is actually identical to the Intel extended long double no error domain range; it isn't that surprising, both IEEE quad and Intel/Motorola extended have the same exponent range [-16381, 16384] (well, Motorola -16382 probably because of different behavior for denormals, but that has nothing to do with get_no_error_domain which is about large inputs overflowing into +-Inf or triggering NaN, denormals could in theory do something solely for sqrt and even that is fine). In theory some target could have different larger type, so for *F64X the code verifies that REAL_MODE_FORMAT (TYPE_MODE (float64x_type_node))->emax == 16384 and if so, uses the *F128 domains, otherwise falls back to the non-suffixed ones (aka *F64), that is certainly the conservative minimum. While at it, the patch also changes the *L suffixed cases to do pretty much the same, the comment said that the function just assumes for *L the *F64 ranges, but that is unnecessarily conservative. All we currently have for long double is: 1) IEEE quad (emax 16384, *F128 ranges) 2) XFmode Intel/Motorola extended (emax 16384, same as *F128 ranges) 3) IBM extended (double double, emax 1024, the extra precision doesn't really help and the domains are the same as for *F64) 4) same as double (*F64 again) So, the patch uses also for *L REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384 checks and either tail recurses into the *F128 case for that or to non-suffixed (aka *F64) case otherwise. BUILT_IN_*F128X not handled because no target has those and it doesn't seem something is on the horizon and who knows what would be used for that. Thus, all we get this wrong for are probably VAX floats or something similar, no intent from me to look at that, that is preexisting issue. BTW, I'm surprised we don't have BUILT_IN_EXP10F{16,32,64,128,32X,64X,128X} builtins, seems glibc has those (sure, I think except *16 and *128x). 2024-02-22 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/113993 * tree-call-cdce.cc (get_no_error_domain): Handle BUILT_IN_{COSH,SINH,EXP{,M1,2}}{F32X,F64X}. Handle BUILT_IN_{COSH,SINH,EXP{,M1,2}}L for REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384 the as the F128 suffixed cases, otherwise as non-suffixed ones. Handle BUILT_IN_{EXP,POW}10L for REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384 as (-inf, 4932). * gcc.dg/tree-ssa/pr113993.c: New test.	2024-02-22 10:19:15 +01:00
Jakub Jelinek	853cbcb7a7	bitintlower: Fix .MUL_OVERFLOW overflow checking [PR114038] ... Currently, bitint_large_huge::lower_mul_overflow uses cnt 1 only if startlimb == endlimb and in that case doesn't use a loop and handles everything in a special if: unsigned cnt; bool use_loop = false; if (startlimb == endlimb) cnt = 1; else if (startlimb + 1 == endlimb) cnt = 2; else if ((end % limb_prec) == 0) { cnt = 2; use_loop = true; } else { cnt = 3; use_loop = startlimb + 2 < endlimb; } if (cnt == 1) { ... } else The loop handling for the loop exit condition wants to compare if the incremented index is equal to endlimb, but that is correct only if end is not divisible by limb_prec and there will be a straight line check after the loop as well for the most significant limb. The code used endlimb + (cnt == 1) for that, but cnt == 1 is never true here, because cnt is either 2 or 3, so the right check is (cnt == 2). 2024-02-22 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/114038 * gimple-lower-bitint.cc (bitint_large_huge::lower_mul_overflow): Fix loop exit condition if end is divisible by limb_prec. * gcc.dg/torture/bitint-59.c: New test.	2024-02-22 10:14:00 +01:00
YunQiang Su	00bc8c0998	invoke.texi: Fix some skipping UrlSuffix problem for MIPS ... The problem is that, there are these lines in mips.opt.urls: ; skipping UrlSuffix for 'mabi=' due to finding no URLs ; skipping UrlSuffix for 'mno-flush-func' due to finding no URLs ; skipping UrlSuffix for 'mexplicit-relocs' due to finding no URLs These lines is not fixed by this patch due to that we don't document these options: ; skipping UrlSuffix for 'mlra' due to finding no URLs ; skipping UrlSuffix for 'mdebug' due to finding no URLs ; skipping UrlSuffix for 'meb' due to finding no URLs ; skipping UrlSuffix for 'mel' due to finding no URLs gcc * doc/invoke.texi(MIPS Options): Fix skipping UrlSuffix problem of mabi=, mno-flush-func, mexplicit-relocs; add missing leading - of mbranch-cost option. * config/mips/mips.opt.urls: Regenerate.	2024-02-22 13:17:57 +08:00
Kewen Lin	438ef14367	rs6000: Neuter option -mpower{8,9}-vector [PR109987] ... As PR109987 and its duplicated bugs show, -mno-power8-vector (and -mno-power9-vector) cause some problems and as Segher pointed out in [1] they are workaround options, so this patch is to remove -m{no,}-power{8,9}-options. Like what we did for option -mdirect-move before, this patch still keep the corresponding internal flags and they are automatically set based on -mcpu. The test suite update takes some efforts, it consists of some aspects: - effective target powerpc_p{8,9}vector_ok are removed and replaced with powerpc_vsx_ok. - Some cases having -mpower{8,9}-vector are updated with -mvsx, some of them already have -mdejagnu-cpu. For those that don't have -mdejagnu-cpu, if -mdejagnu-cpu is needed for the test point, then it's appended; otherwise, add additional-options -mdejagnu-cpu=power{8,9} if has_arch_pwr{8,9} isn't satisfied. - Some test cases are updated with explicit -mvsx. - Some test cases with those two option mixed are adjusted to keep the test points, like -mpower8-vector -mno-power9-vector are updated with -mdejagnu-cpu=power8 -mvsx etc. - Some test cases with -mno-power{8,9}-vector are updated by replacing -mno-power{8,9}-vector with -mno-vsx, or just removing it. - For some cases, we don't always specify -mdejagnu-cpu to avoid to restrict the testing coverage, it would check has_arch_pwr{8,9} and appended that as need. - For vect test cases run, it doesn't specify -mcpu=power9 for power10 and up. Bootstrapped and regtested on: - powerpc64-linux-gnu P7/P8/P9 {-m32,-m64} - powerpc64le-linux-gnu P8/P9/P10 Although it's stage4 now, as the discussion in PR113115 we are still eager to neuter these two options, so is it ok for trunk? [1] https://gcc.gnu.org/pipermail/gcc-patches/2022-January/589303.html PR target/109987 gcc/ChangeLog: * config/rs6000/constraints.md (we): Update internal doc without referring to option -mpower9-vector. * config/rs6000/driver-rs6000.cc (asm_names): Remove mpower9-vector special handlings. * config/rs6000/rs6000-cpus.def (OTHER_P9_VECTOR_MASKS, OTHER_P8_VECTOR_MASKS): Merge to ... (OTHER_VSX_VECTOR_MASKS): ... here. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove some error message handlings and explicit option mask adjustments on explicit option power{8,9}-vector conflicting with other options. (rs6000_print_isa_options): Update comments. (rs6000_disable_incompatible_switches): Remove power{8,9}-vector related array items and handlings. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Remove mpower9-vector special handlings. * config/rs6000/rs6000.opt: Make option power{8,9}-vector as WarnRemoved. * doc/extend.texi: Remove documentation referring to option -mpower8-vector. * doc/invoke.texi: Remove documentation for option -mpower{8,9}-vector and adjust some documentation referring to them. * doc/md.texi: Update documentation for constraint we. * doc/sourcebuild.texi: Remove documentation for powerpc_p8vector_ok. libgcc/ChangeLog: * config/rs6000/t-float128-hw: Replace options -mpower{8,9}-vector with -mcpu=power9. * configure.ac: Update use of option -mpower9-vector with -mcpu=power9. * configure: Regenerate. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_powerpc_p8vector_ok): Remove. (check_effective_target_powerpc_p9vector_ok): Remove. (check_p8vector_hw_available): Replace -mpower8-vector with -mcpu=power8. (check_p9vector_hw_available): Replace -mpower9-vector with -mcpu=power9. (check_ppc_float128_hw_available): Likewise. (check_vect_support_and_set_flags): Replace -mpower8-vector with -mcpu=power8, replace -mpower9-vector with -mcpu=power9 or nothing if check_power10_hw_available and place -mcpu=970 first if needed to avoid possible overriding. * g++.target/powerpc/altivec-19.C: Replace powerpc_p9vector_ok with powerpc_vsx_ok and append -mvsx to dg-options. * gcc.target/powerpc/bfp/scalar-cmp-exp-eq-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-eq-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-eq-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-gt-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-gt-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-gt-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-lt-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-lt-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-lt-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-cmp-exp-unordered-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-exp-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-exp-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-exp-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-exp-5.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-extract-sig-5.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-10.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-11.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-5.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-6.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-7.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-8.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-9.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-10.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-11.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-5.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-6.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-7.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-8.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-data-class-9.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-0.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-1.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-2.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-3.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-test-neg-5.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-exp-0.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-exp-1.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-exp-2.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-exp-3.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-sig-0.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-sig-1.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-sig-2.c: Likewise. * gcc.target/powerpc/bfp/vec-extract-sig-3.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-0.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-1.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-2.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-3.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-4.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-5.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-6.c: Likewise. * gcc.target/powerpc/bfp/vec-insert-exp-7.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-0.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-1.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-2.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-3.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-4.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-5.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-6.c: Likewise. * gcc.target/powerpc/bfp/vec-test-data-class-7.c: Likewise. * gcc.target/powerpc/builtins-3-p9.c: Likewise. * gcc.target/powerpc/byte-in-either-range-0.c: Likewise. * gcc.target/powerpc/byte-in-either-range-1.c: Likewise. * gcc.target/powerpc/byte-in-range-0.c: Likewise. * gcc.target/powerpc/byte-in-range-1.c: Likewise. * gcc.target/powerpc/byte-in-set-0.c: Likewise. * gcc.target/powerpc/byte-in-set-1.c: Likewise. * gcc.target/powerpc/byte-in-set-2.c: Likewise. * gcc.target/powerpc/clone1.c: Likewise. * gcc.target/powerpc/ctz-3.c: Likewise. * gcc.target/powerpc/ctz-4.c: Likewise. * gcc.target/powerpc/darn-0.c: Likewise. * gcc.target/powerpc/darn-1.c: Likewise. * gcc.target/powerpc/darn-2.c: Likewise. * gcc.target/powerpc/dform-3.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-0.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-1.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-10.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-11.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-12.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-13.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-14.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-15.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-16.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-17.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-18.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-19.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-2.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-20.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-21.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-22.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-23.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-24.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-25.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-26.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-27.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-28.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-29.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-3.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-30.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-31.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-32.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-33.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-34.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-35.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-36.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-37.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-38.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-39.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-4.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-40.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-41.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-42.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-43.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-44.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-45.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-46.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-47.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-48.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-49.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-5.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-50.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-51.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-52.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-53.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-54.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-55.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-56.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-57.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-58.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-59.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-6.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-60.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-61.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-62.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-63.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-64.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-65.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-66.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-67.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-68.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-69.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-7.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-70.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-71.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-72.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-73.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-74.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-75.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-76.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-77.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-78.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-79.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-8.c: Likewise. * gcc.target/powerpc/dfp/dtstsfi-9.c: Likewise. * gcc.target/powerpc/direct-move-vector.c: Likewise. * gcc.target/powerpc/float128-type-2.c: Likewise. * gcc.target/powerpc/fold-vec-abs-int-fwrapv.p9.c: Likewise. * gcc.target/powerpc/fold-vec-abs-int.p9.c: Likewise. * gcc.target/powerpc/fold-vec-abs-longlong-fwrapv.p9.c: Likewise. * gcc.target/powerpc/fold-vec-abs-longlong.p9.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-char.p9.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-short.p9.c: Likewise. * gcc.target/powerpc/fold-vec-extract-char.p9.c: Likewise. * gcc.target/powerpc/fold-vec-extract-float.p9.c: Likewise. * gcc.target/powerpc/fold-vec-extract-int.p9.c: Likewise. * gcc.target/powerpc/fold-vec-extract-longlong.p9.c: Likewise. * gcc.target/powerpc/fold-vec-extract-short.p9.c: Likewise. * gcc.target/powerpc/fold-vec-insert-char-p9.c: Likewise. * gcc.target/powerpc/fold-vec-insert-float-p9.c: Likewise. * gcc.target/powerpc/fold-vec-insert-int-p9.c: Likewise. * gcc.target/powerpc/fold-vec-insert-short-p9.c: Likewise. * gcc.target/powerpc/fold-vec-mult-int128-p9.c: Likewise. * gcc.target/powerpc/fold-vec-neg-int.p9.c: Likewise. * gcc.target/powerpc/fold-vec-neg-longlong.p9.c: Likewise. * gcc.target/powerpc/p9-dimode1.c: Likewise. * gcc.target/powerpc/p9-dimode2.c: Likewise. * gcc.target/powerpc/p9-extract-1.c: Likewise. * gcc.target/powerpc/p9-extract-2.c: Likewise. * gcc.target/powerpc/p9-extract-3.c: Likewise. * gcc.target/powerpc/p9-extract-4.c: Likewise. * gcc.target/powerpc/p9-fpcvt-1.c: Likewise. * gcc.target/powerpc/p9-fpcvt-2.c: Likewise. * gcc.target/powerpc/p9-fpcvt-3.c: Likewise. * gcc.target/powerpc/p9-lxvx-stxvx-1.c: Likewise. * gcc.target/powerpc/p9-lxvx-stxvx-2.c: Likewise. * gcc.target/powerpc/p9-lxvx-stxvx-3.c: Likewise. * gcc.target/powerpc/p9-minmax-1.c: Likewise. * gcc.target/powerpc/p9-minmax-2.c: Likewise. * gcc.target/powerpc/p9-minmax-3.c: Likewise. * gcc.target/powerpc/p9-novsx.c: Likewise. * gcc.target/powerpc/p9-permute.c: Likewise. * gcc.target/powerpc/p9-sign_extend-runnable.c: Likewise. * gcc.target/powerpc/p9-splat-1.c: Likewise. * gcc.target/powerpc/p9-splat-2.c: Likewise. * gcc.target/powerpc/p9-splat-3.c: Likewise. * gcc.target/powerpc/p9-splat-4.c: Likewise. * gcc.target/powerpc/p9-splat-5.c: Likewise. * gcc.target/powerpc/p9-vbpermd.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-1.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-2.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-3.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-4.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-5.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-6.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-7.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-8.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-1.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-2.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-3.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-4.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-5.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-6.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-7.c: Likewise. * gcc.target/powerpc/p9-vec-length-full-8.c: Likewise. * gcc.target/powerpc/p9-vneg.c: Likewise. * gcc.target/powerpc/p9-vparity.c: Likewise. * gcc.target/powerpc/p9-vpermr.c: Likewise. * gcc.target/powerpc/p9-xxbr-1.c: Likewise. * gcc.target/powerpc/p9-xxbr-2.c: Likewise. * gcc.target/powerpc/p9-xxbr-3.c: Likewise. * gcc.target/powerpc/ppc-fortran/pr80108-1.f90: Likewise. * gcc.target/powerpc/ppc-round3.c: Likewise. * gcc.target/powerpc/pr103124.c: Likewise. * gcc.target/powerpc/pr104015-1.c: Likewise. * gcc.target/powerpc/pr106769-p9.c: Likewise. * gcc.target/powerpc/pr107412.c: Likewise. * gcc.target/powerpc/pr110429.c: Likewise. * gcc.target/powerpc/pr66144-1.c: Likewise. * gcc.target/powerpc/pr71186.c: Likewise. * gcc.target/powerpc/pr71309.c: Likewise. * gcc.target/powerpc/pr71670.c: Likewise. * gcc.target/powerpc/pr71698.c: Likewise. * gcc.target/powerpc/pr71720.c: Likewise. * gcc.target/powerpc/pr72853.c: Likewise. * gcc.target/powerpc/pr78056-1.c: Likewise. * gcc.target/powerpc/pr78658.c: Likewise. * gcc.target/powerpc/pr78953.c: Likewise. * gcc.target/powerpc/pr79004.c: Likewise. * gcc.target/powerpc/pr79038-1.c: Likewise. * gcc.target/powerpc/pr79179.c: Likewise. * gcc.target/powerpc/pr79251.p9.c: Likewise. * gcc.target/powerpc/pr79799-1.c: Likewise. * gcc.target/powerpc/pr79799-2.c: Likewise. * gcc.target/powerpc/pr79799-3.c: Likewise. * gcc.target/powerpc/pr79799-5.c: Likewise. * gcc.target/powerpc/pr80695-p9.c: Likewise. * gcc.target/powerpc/pr81348.c: Likewise. * gcc.target/powerpc/pr81622.c: Likewise. * gcc.target/powerpc/pr84154-3.c: Likewise. * gcc.target/powerpc/pr90763.c: Likewise. * gcc.target/powerpc/pr96933-1.c: Likewise. * gcc.target/powerpc/sad-vectorize-1.c: Likewise. * gcc.target/powerpc/sad-vectorize-2.c: Likewise. * gcc.target/powerpc/signbit-2.c: Likewise. * gcc.target/powerpc/vadsdu-0.c: Likewise. * gcc.target/powerpc/vadsdu-1.c: Likewise. * gcc.target/powerpc/vadsdu-2.c: Likewise. * gcc.target/powerpc/vadsdu-3.c: Likewise. * gcc.target/powerpc/vadsdu-4.c: Likewise. * gcc.target/powerpc/vadsdu-5.c: Likewise. * gcc.target/powerpc/vadsdub-1.c: Likewise. * gcc.target/powerpc/vadsdub-2.c: Likewise. * gcc.target/powerpc/vadsduh-1.c: Likewise. * gcc.target/powerpc/vadsduh-2.c: Likewise. * gcc.target/powerpc/vadsduw-1.c: Likewise. * gcc.target/powerpc/vadsduw-2.c: Likewise. * gcc.target/powerpc/vec-extract-4.c: Likewise. * gcc.target/powerpc/vec-init-3.c: Likewise. * gcc.target/powerpc/vec-minmax-1.c: Likewise. * gcc.target/powerpc/vec-minmax-2.c: Likewise. * gcc.target/powerpc/vec-set-char.c: Likewise. * gcc.target/powerpc/vec-set-int.c: Likewise. * gcc.target/powerpc/vec-set-short.c: Likewise. * gcc.target/powerpc/vec_reve_2.c: Likewise. * gcc.target/powerpc/vector_float.c: Likewise. * gcc.target/powerpc/vslv-0.c: Likewise. * gcc.target/powerpc/vslv-1.c: Likewise. * gcc.target/powerpc/vsrv-0.c: Likewise. * gcc.target/powerpc/vsrv-1.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-0.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-1.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-10.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-11.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-12.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-13.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-14.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-2.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-3.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-4.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-5.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-6.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-7.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-8.c: Likewise. * gcc.target/powerpc/vsu/vec-all-ne-9.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-1.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-2.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-3.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-4.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-5.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-6.c: Likewise. * gcc.target/powerpc/vsu/vec-all-nez-7.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-0.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-1.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-10.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-11.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-12.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-13.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-14.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-2.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-3.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-4.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-5.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-6.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-7.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-8.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eq-9.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-1.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-2.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-3.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-4.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-5.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-6.c: Likewise. * gcc.target/powerpc/vsu/vec-any-eqz-7.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-0.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-1.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-2.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-3.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-4.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-5.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-6.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-8.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpne-9.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-1.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-2.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-3.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-4.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-5.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-6.c: Likewise. * gcc.target/powerpc/vsu/vec-cmpnez-7.c: Likewise. * gcc.target/powerpc/vsu/vec-cntlz-lsbb-0.c: Likewise. * gcc.target/powerpc/vsu/vec-cntlz-lsbb-1.c: Likewise. * gcc.target/powerpc/vsu/vec-cntlz-lsbb-2.c: Likewise. * gcc.target/powerpc/vsu/vec-cntlz-lsbb-3.c: Likewise. * gcc.target/powerpc/vsu/vec-cntlz-lsbb-4.c: Likewise. * gcc.target/powerpc/vsu/vec-cnttz-lsbb-0.c: Likewise. * gcc.target/powerpc/vsu/vec-cnttz-lsbb-1.c: Likewise. * gcc.target/powerpc/vsu/vec-cnttz-lsbb-2.c: Likewise. * gcc.target/powerpc/vsu/vec-cnttz-lsbb-3.c: Likewise. * gcc.target/powerpc/vsu/vec-cnttz-lsbb-4.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-0.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-1.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-10.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-11.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-12.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-13.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-2.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-3.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-4.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-5.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-6.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-7.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-8.c: Likewise. * gcc.target/powerpc/vsu/vec-xl-len-9.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-0.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-1.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-2.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-3.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-4.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-5.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-6.c: Likewise. * gcc.target/powerpc/vsu/vec-xlx-7.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-0.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-1.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-2.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-3.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-4.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-5.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-6.c: Likewise. * gcc.target/powerpc/vsu/vec-xrx-7.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-0.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-1.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-10.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-11.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-12.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-13.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-2.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-3.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-4.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-5.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-6.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-7.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-8.c: Likewise. * gcc.target/powerpc/vsu/vec-xst-len-9.c: Likewise. * gcc.target/powerpc/vsx-builtin-msum.c: Likewise. * gcc.target/powerpc/vsx-himode.c: Likewise. * gcc.target/powerpc/vsx-himode2.c: Likewise. * gcc.target/powerpc/vsx-himode3.c: Likewise. * gcc.target/powerpc/vsx-qimode.c: Likewise. * gcc.target/powerpc/vsx-qimode2.c: Likewise. * gcc.target/powerpc/vsx-qimode3.c: Likewise. * g++.target/powerpc/pr65240-1.C: Replace powerpc_p8vector_ok with powerpc_vsx_ok and append -mvsx to dg-options. * g++.target/powerpc/pr65240-2.C: Likewise. * g++.target/powerpc/pr65240-3.C: Likewise. * g++.target/powerpc/pr65242.C: Likewise. * g++.target/powerpc/pr67211.C: Likewise. * g++.target/powerpc/pr71294.C: Likewise. * g++.target/powerpc/pr84279.C: Likewise. * g++.target/powerpc/pr93974.C: Likewise. * gcc.target/powerpc/atomic-p8.c: Likewise. * gcc.target/powerpc/atomic_load_store-p8.c: Likewise. * gcc.target/powerpc/bcd-2.c: Likewise. * gcc.target/powerpc/bcd-3.c: Likewise. * gcc.target/powerpc/bool2-p8.c: Likewise. * gcc.target/powerpc/bool3-p8.c: Likewise. * gcc.target/powerpc/builtins-1.c: Likewise. * gcc.target/powerpc/builtins-3-p8.c: Likewise. * gcc.target/powerpc/builtins-5.c: Likewise. * gcc.target/powerpc/builtins-9.c: Likewise. * gcc.target/powerpc/crypto-builtin-1.c: Likewise. * gcc.target/powerpc/crypto-builtin-2.c: Likewise. * gcc.target/powerpc/direct-move-double1.c: Likewise. * gcc.target/powerpc/direct-move-float1.c: Likewise. * gcc.target/powerpc/direct-move-long1.c: Likewise. * gcc.target/powerpc/direct-move-vint1.c: Likewise. * gcc.target/powerpc/float128-type-1.c: Likewise. * gcc.target/powerpc/fold-vec-extract-char.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-double.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-float.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-int.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Likewise. * gcc.target/powerpc/fold-vec-extract-short.p8.c: Likewise. * gcc.target/powerpc/fold-vec-insert-char-p8.c: Likewise. * gcc.target/powerpc/fold-vec-insert-float-p8.c: Likewise. * gcc.target/powerpc/fold-vec-insert-int-p8.c: Likewise. * gcc.target/powerpc/fold-vec-insert-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-insert-short-p8.c: Likewise. * gcc.target/powerpc/fold-vec-neg-char.c: Likewise. * gcc.target/powerpc/fold-vec-neg-floatdouble.c: Likewise. * gcc.target/powerpc/fold-vec-neg-int.p8.c: Likewise. * gcc.target/powerpc/fold-vec-neg-short.c: Likewise. * gcc.target/powerpc/fold-vec-select-double.c: Likewise. * gcc.target/powerpc/fold-vec-store-builtin_vec_xst-longlong.c: Likewise. * gcc.target/powerpc/fusion.c: Likewise. * gcc.target/powerpc/fusion2.c: Likewise. * gcc.target/powerpc/mul-vectorize-1.c: Likewise. * gcc.target/powerpc/p8-vec-xl-xst-v2.c: Likewise. * gcc.target/powerpc/p8-vec-xl-xst.c: Likewise. * gcc.target/powerpc/p8vector-builtin-1.c: Likewise. * gcc.target/powerpc/p8vector-builtin-2.c: Likewise. * gcc.target/powerpc/p8vector-builtin-3.c: Likewise. * gcc.target/powerpc/p8vector-builtin-4.c: Likewise. * gcc.target/powerpc/p8vector-builtin-5.c: Likewise. * gcc.target/powerpc/p8vector-builtin-6.c: Likewise. * gcc.target/powerpc/p8vector-builtin-7.c: Likewise. * gcc.target/powerpc/p8vector-fp.c: Likewise. * gcc.target/powerpc/p8vector-int128-1.c: Likewise. * gcc.target/powerpc/p8vector-ldst.c: Likewise. * gcc.target/powerpc/p8vector-vbpermq.c: Likewise. * gcc.target/powerpc/p8vector-vectorize-1.c: Likewise. * gcc.target/powerpc/p8vector-vectorize-2.c: Likewise. * gcc.target/powerpc/p8vector-vectorize-3.c: Likewise. * gcc.target/powerpc/p8vector-vectorize-4.c: Likewise. * gcc.target/powerpc/p8vector-vectorize-5.c: Likewise. * gcc.target/powerpc/ppc-round2.c: Likewise. * gcc.target/powerpc/pr100866-1.c: Likewise. * gcc.target/powerpc/pr100866-2.c: Likewise. * gcc.target/powerpc/pr104239-1.c: Likewise. * gcc.target/powerpc/pr104239-2.c: Likewise. * gcc.target/powerpc/pr104239-3.c: Likewise. * gcc.target/powerpc/pr106769-p8.c: Likewise. * gcc.target/powerpc/pr108396.c: Likewise. * gcc.target/powerpc/pr111449-1.c: Likewise. * gcc.target/powerpc/pr57744.c: Likewise. * gcc.target/powerpc/pr58673-1.c: Likewise. * gcc.target/powerpc/pr58673-2.c: Likewise. * gcc.target/powerpc/pr60137.c: Likewise. * gcc.target/powerpc/pr60203.c: Likewise. * gcc.target/powerpc/pr66144-2.c: Likewise. * gcc.target/powerpc/pr66144-3.c: Likewise. * gcc.target/powerpc/pr68163.c: Likewise. * gcc.target/powerpc/pr69548.c: Likewise. * gcc.target/powerpc/pr70669.c: Likewise. * gcc.target/powerpc/pr71977-1.c: Likewise. * gcc.target/powerpc/pr71977-2.c: Likewise. * gcc.target/powerpc/pr72717.c: Likewise. * gcc.target/powerpc/pr78056-3.c: Likewise. * gcc.target/powerpc/pr78056-4.c: Likewise. * gcc.target/powerpc/pr78102.c: Likewise. * gcc.target/powerpc/pr78543.c: Likewise. * gcc.target/powerpc/pr78604.c: Likewise. * gcc.target/powerpc/pr79251.p8.c: Likewise. * gcc.target/powerpc/pr79354.c: Likewise. * gcc.target/powerpc/pr79544.c: Likewise. * gcc.target/powerpc/pr79907.c: Likewise. * gcc.target/powerpc/pr79951.c: Likewise. * gcc.target/powerpc/pr80315-1.c: Likewise. * gcc.target/powerpc/pr80315-2.c: Likewise. * gcc.target/powerpc/pr80315-3.c: Likewise. * gcc.target/powerpc/pr80315-4.c: Likewise. * gcc.target/powerpc/pr80510-2.c: Likewise. * gcc.target/powerpc/pr80695-p8.c: Likewise. * gcc.target/powerpc/pr80718.c: Likewise. * gcc.target/powerpc/pr84154-2.c: Likewise. * gcc.target/powerpc/pr88558-p8.c: Likewise. * gcc.target/powerpc/pr88845.c: Likewise. * gcc.target/powerpc/pr91903.c: Likewise. * gcc.target/powerpc/pr92923-2.c: Likewise. * gcc.target/powerpc/pr96933-2.c: Likewise. * gcc.target/powerpc/pr97019.c: Likewise. * gcc.target/powerpc/pragma_power8.c: Likewise. * gcc.target/powerpc/signbit-1.c: Likewise. * gcc.target/powerpc/swaps-p8-1.c: Likewise. * gcc.target/powerpc/swaps-p8-12.c: Likewise. * gcc.target/powerpc/swaps-p8-14.c: Likewise. * gcc.target/powerpc/swaps-p8-15.c: Likewise. * gcc.target/powerpc/swaps-p8-16.c: Likewise. * gcc.target/powerpc/swaps-p8-17.c: Likewise. * gcc.target/powerpc/swaps-p8-18.c: Likewise. * gcc.target/powerpc/swaps-p8-19.c: Likewise. * gcc.target/powerpc/swaps-p8-2.c: Likewise. * gcc.target/powerpc/swaps-p8-22.c: Likewise. * gcc.target/powerpc/swaps-p8-23.c: Likewise. * gcc.target/powerpc/swaps-p8-24.c: Likewise. * gcc.target/powerpc/swaps-p8-25.c: Likewise. * gcc.target/powerpc/swaps-p8-26.c: Likewise. * gcc.target/powerpc/swaps-p8-27.c: Likewise. * gcc.target/powerpc/swaps-p8-3.c: Likewise. * gcc.target/powerpc/swaps-p8-30.c: Likewise. * gcc.target/powerpc/swaps-p8-33.c: Likewise. * gcc.target/powerpc/swaps-p8-36.c: Likewise. * gcc.target/powerpc/swaps-p8-39.c: Likewise. * gcc.target/powerpc/swaps-p8-4.c: Likewise. * gcc.target/powerpc/swaps-p8-42.c: Likewise. * gcc.target/powerpc/swaps-p8-45.c: Likewise. * gcc.target/powerpc/swaps-p8-46.c: Likewise. * gcc.target/powerpc/swaps-p8-5.c: Likewise. * gcc.target/powerpc/unpack-vectorize-3.c: Likewise. * gcc.target/powerpc/upper-regs-sf.c: Likewise. * gcc.target/powerpc/vec-cmp.c: Likewise. * gcc.target/powerpc/vec-extract-1.c: Likewise. * gcc.target/powerpc/vec-extract-3.c: Likewise. * gcc.target/powerpc/vec-extract-5.c: Likewise. * gcc.target/powerpc/vec-extract-6.c: Likewise. * gcc.target/powerpc/vec-extract-7.c: Likewise. * gcc.target/powerpc/vec-extract-8.c: Likewise. * gcc.target/powerpc/vec-extract-9.c: Likewise. * gcc.target/powerpc/vec-init-10.c: Likewise. * gcc.target/powerpc/vec-init-6.c: Likewise. * gcc.target/powerpc/vec-init-7.c: Likewise. * gcc.target/powerpc/vsx-extract-3.c: Likewise. * gcc.target/powerpc/vsx-extract-4.c: Likewise. * gcc.target/powerpc/vsx-extract-5.c: Likewise. * gcc.target/powerpc/vsx-simode.c: Likewise. * gcc.target/powerpc/vsx-simode2.c: Likewise. * gcc.target/powerpc/vsx-simode3.c: Likewise. * gcc.target/powerpc/builtins-4-int128-runnable.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok, replace -mpower8-vector with -mvsx, and add dg-additional-options -mdejagnu-cpu=power8 if !has_arch_pwr8. * gcc.target/powerpc/builtins-mergew-mergow.c: Likewise. * gcc.target/powerpc/direct-move-float3.c: Likewise. * gcc.target/powerpc/divkc3-2.c: Likewise. * gcc.target/powerpc/divkc3-3.c: Likewise. * gcc.target/powerpc/fold-vec-abs-longlong-fwrapv.c: Likewise. * gcc.target/powerpc/fold-vec-abs-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-add-4.c: Likewise. * gcc.target/powerpc/fold-vec-add-7.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-int.h: Likewise. * gcc.target/powerpc/fold-vec-cmp-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-short.h: Likewise. * gcc.target/powerpc/fold-vec-cntlz-char.c: Likewise. * gcc.target/powerpc/fold-vec-cntlz-int.c: Likewise. * gcc.target/powerpc/fold-vec-cntlz-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-cntlz-short.c: Likewise. * gcc.target/powerpc/fold-vec-ld-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-char.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-float.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-floatdouble.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-int.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-logical-eqv-short.c: Likewise. * gcc.target/powerpc/fold-vec-logical-ors-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-logical-other-char.c: Likewise. * gcc.target/powerpc/fold-vec-logical-other-int.c: Likewise. * gcc.target/powerpc/fold-vec-logical-other-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-logical-other-short.c: Likewise. * gcc.target/powerpc/fold-vec-mergehl-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-minmax-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-mult-int.c: Likewise. * gcc.target/powerpc/fold-vec-mult-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-neg-int.c: Likewise. * gcc.target/powerpc/fold-vec-neg-longlong.h: Likewise. * gcc.target/powerpc/fold-vec-pack-double.c: Likewise. * gcc.target/powerpc/fold-vec-pack-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-shift-left-longlong-fwrapv.c: Likewise. * gcc.target/powerpc/fold-vec-shift-left-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-shift-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-st-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-sub-int128.c: Likewise. * gcc.target/powerpc/fold-vec-sub-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-unpack-float.c: Likewise. * gcc.target/powerpc/fold-vec-unpack-int.c: Likewise. * gcc.target/powerpc/mmx-packs.c: Likewise. * gcc.target/powerpc/mmx-packssdw-1.c: Likewise. * gcc.target/powerpc/mmx-packsswb-1.c: Likewise. * gcc.target/powerpc/mmx-packuswb-1.c: Likewise. * gcc.target/powerpc/mmx-paddb-1.c: Likewise. * gcc.target/powerpc/mmx-paddd-1.c: Likewise. * gcc.target/powerpc/mmx-paddsb-1.c: Likewise. * gcc.target/powerpc/mmx-paddsw-1.c: Likewise. * gcc.target/powerpc/mmx-paddusb-1.c: Likewise. * gcc.target/powerpc/mmx-paddusw-1.c: Likewise. * gcc.target/powerpc/mmx-paddw-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpeqb-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpeqd-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpeqw-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpgtb-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpgtd-1.c: Likewise. * gcc.target/powerpc/mmx-pcmpgtw-1.c: Likewise. * gcc.target/powerpc/mmx-pmaddwd-1.c: Likewise. * gcc.target/powerpc/mmx-pmulhw-1.c: Likewise. * gcc.target/powerpc/mmx-pmullw-1.c: Likewise. * gcc.target/powerpc/mmx-pslld-1.c: Likewise. * gcc.target/powerpc/mmx-psllw-1.c: Likewise. * gcc.target/powerpc/mmx-psrad-1.c: Likewise. * gcc.target/powerpc/mmx-psraw-1.c: Likewise. * gcc.target/powerpc/mmx-psrld-1.c: Likewise. * gcc.target/powerpc/mmx-psrlw-1.c: Likewise. * gcc.target/powerpc/mmx-psubb-2.c: Likewise. * gcc.target/powerpc/mmx-psubd-2.c: Likewise. * gcc.target/powerpc/mmx-psubsb-1.c: Likewise. * gcc.target/powerpc/mmx-psubsw-1.c: Likewise. * gcc.target/powerpc/mmx-psubusb-1.c: Likewise. * gcc.target/powerpc/mmx-psubusw-1.c: Likewise. * gcc.target/powerpc/mmx-psubw-2.c: Likewise. * gcc.target/powerpc/mmx-punpckhbw-1.c: Likewise. * gcc.target/powerpc/mmx-punpckhdq-1.c: Likewise. * gcc.target/powerpc/mmx-punpckhwd-1.c: Likewise. * gcc.target/powerpc/mmx-punpcklbw-1.c: Likewise. * gcc.target/powerpc/mmx-punpckldq-1.c: Likewise. * gcc.target/powerpc/mmx-punpcklwd-1.c: Likewise. * gcc.target/powerpc/mulkc3-2.c: Likewise. * gcc.target/powerpc/mulkc3-3.c: Likewise. * gcc.target/powerpc/p8vector-builtin-8.c: Likewise. * gcc.target/powerpc/pr37191.c: Likewise. * gcc.target/powerpc/pr83862.c: Likewise. * gcc.target/powerpc/pr84154-1.c: Likewise. * gcc.target/powerpc/pr84220-sld2.c: Likewise. * gcc.target/powerpc/pr85456.c: Likewise. * gcc.target/powerpc/pr86731-longlong.c: Likewise. * gcc.target/powerpc/sse-addps-1.c: Likewise. * gcc.target/powerpc/sse-addss-1.c: Likewise. * gcc.target/powerpc/sse-andnps-1.c: Likewise. * gcc.target/powerpc/sse-andps-1.c: Likewise. * gcc.target/powerpc/sse-cmpss-1.c: Likewise. * gcc.target/powerpc/sse-cvtpi16ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtpi32ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtpi32x2ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtpi8ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtpspi16-1.c: Likewise. * gcc.target/powerpc/sse-cvtpspi8-1.c: Likewise. * gcc.target/powerpc/sse-cvtpu16ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtpu8ps-1.c: Likewise. * gcc.target/powerpc/sse-cvtsi2ss-1.c: Likewise. * gcc.target/powerpc/sse-cvtsi2ss-2.c: Likewise. * gcc.target/powerpc/sse-cvtss2si-1.c: Likewise. * gcc.target/powerpc/sse-cvtss2si-2.c: Likewise. * gcc.target/powerpc/sse-cvttss2si-1.c: Likewise. * gcc.target/powerpc/sse-cvttss2si-2.c: Likewise. * gcc.target/powerpc/sse-divps-1.c: Likewise. * gcc.target/powerpc/sse-divss-1.c: Likewise. * gcc.target/powerpc/sse-maxps-1.c: Likewise. * gcc.target/powerpc/sse-maxps-2.c: Likewise. * gcc.target/powerpc/sse-maxss-1.c: Likewise. * gcc.target/powerpc/sse-minps-1.c: Likewise. * gcc.target/powerpc/sse-minps-2.c: Likewise. * gcc.target/powerpc/sse-minss-1.c: Likewise. * gcc.target/powerpc/sse-movaps-1.c: Likewise. * gcc.target/powerpc/sse-movaps-2.c: Likewise. * gcc.target/powerpc/sse-movhlps-1.c: Likewise. * gcc.target/powerpc/sse-movhps-1.c: Likewise. * gcc.target/powerpc/sse-movhps-2.c: Likewise. * gcc.target/powerpc/sse-movlhps-1.c: Likewise. * gcc.target/powerpc/sse-movlps-1.c: Likewise. * gcc.target/powerpc/sse-movlps-2.c: Likewise. * gcc.target/powerpc/sse-movmskb-1.c: Likewise. * gcc.target/powerpc/sse-movmskps-1.c: Likewise. * gcc.target/powerpc/sse-movss-1.c: Likewise. * gcc.target/powerpc/sse-movss-2.c: Likewise. * gcc.target/powerpc/sse-movss-3.c: Likewise. * gcc.target/powerpc/sse-mulps-1.c: Likewise. * gcc.target/powerpc/sse-mulss-1.c: Likewise. * gcc.target/powerpc/sse-orps-1.c: Likewise. * gcc.target/powerpc/sse-pavgw-1.c: Likewise. * gcc.target/powerpc/sse-pmaxsw-1.c: Likewise. * gcc.target/powerpc/sse-pmaxub-1.c: Likewise. * gcc.target/powerpc/sse-pminsw-1.c: Likewise. * gcc.target/powerpc/sse-pminub-1.c: Likewise. * gcc.target/powerpc/sse-pmulhuw-1.c: Likewise. * gcc.target/powerpc/sse-psadbw-1.c: Likewise. * gcc.target/powerpc/sse-rcpps-1.c: Likewise. * gcc.target/powerpc/sse-rsqrtps-1.c: Likewise. * gcc.target/powerpc/sse-shufps-1.c: Likewise. * gcc.target/powerpc/sse-sqrtps-1.c: Likewise. * gcc.target/powerpc/sse-subps-1.c: Likewise. * gcc.target/powerpc/sse-subss-1.c: Likewise. * gcc.target/powerpc/sse-ucomiss-1.c: Likewise. * gcc.target/powerpc/sse-ucomiss-2.c: Likewise. * gcc.target/powerpc/sse-ucomiss-3.c: Likewise. * gcc.target/powerpc/sse-ucomiss-4.c: Likewise. * gcc.target/powerpc/sse-ucomiss-5.c: Likewise. * gcc.target/powerpc/sse-ucomiss-6.c: Likewise. * gcc.target/powerpc/sse-unpckhps-1.c: Likewise. * gcc.target/powerpc/sse-unpcklps-1.c: Likewise. * gcc.target/powerpc/sse-xorps-1.c: Likewise. * gcc.target/powerpc/sse2-addpd-1.c: Likewise. * gcc.target/powerpc/sse2-addsd-1.c: Likewise. * gcc.target/powerpc/sse2-andnpd-1.c: Likewise. * gcc.target/powerpc/sse2-andpd-1.c: Likewise. * gcc.target/powerpc/sse2-cmppd-1.c: Likewise. * gcc.target/powerpc/sse2-cmpsd-1.c: Likewise. * gcc.target/powerpc/sse2-comisd-1.c: Likewise. * gcc.target/powerpc/sse2-comisd-2.c: Likewise. * gcc.target/powerpc/sse2-comisd-3.c: Likewise. * gcc.target/powerpc/sse2-comisd-4.c: Likewise. * gcc.target/powerpc/sse2-comisd-5.c: Likewise. * gcc.target/powerpc/sse2-comisd-6.c: Likewise. * gcc.target/powerpc/sse2-cvtdq2pd-1.c: Likewise. * gcc.target/powerpc/sse2-cvtdq2ps-1.c: Likewise. * gcc.target/powerpc/sse2-cvtpd2dq-1.c: Likewise. * gcc.target/powerpc/sse2-cvtpd2ps-1.c: Likewise. * gcc.target/powerpc/sse2-cvtps2dq-1.c: Likewise. * gcc.target/powerpc/sse2-cvtps2pd-1.c: Likewise. * gcc.target/powerpc/sse2-cvtsd2si-1.c: Likewise. * gcc.target/powerpc/sse2-cvtsd2si-2.c: Likewise. * gcc.target/powerpc/sse2-cvtsd2ss-1.c: Likewise. * gcc.target/powerpc/sse2-cvtsi2sd-1.c: Likewise. * gcc.target/powerpc/sse2-cvtsi2sd-2.c: Likewise. * gcc.target/powerpc/sse2-cvtss2sd-1.c: Likewise. * gcc.target/powerpc/sse2-cvttpd2dq-1.c: Likewise. * gcc.target/powerpc/sse2-cvttps2dq-1.c: Likewise. * gcc.target/powerpc/sse2-cvttsd2si-1.c: Likewise. * gcc.target/powerpc/sse2-cvttsd2si-2.c: Likewise. * gcc.target/powerpc/sse2-divpd-1.c: Likewise. * gcc.target/powerpc/sse2-divsd-1.c: Likewise. * gcc.target/powerpc/sse2-maxpd-1.c: Likewise. * gcc.target/powerpc/sse2-maxsd-1.c: Likewise. * gcc.target/powerpc/sse2-minpd-1.c: Likewise. * gcc.target/powerpc/sse2-minsd-1.c: Likewise. * gcc.target/powerpc/sse2-mmx.c: Likewise. * gcc.target/powerpc/sse2-movhpd-1.c: Likewise. * gcc.target/powerpc/sse2-movhpd-2.c: Likewise. * gcc.target/powerpc/sse2-movlpd-1.c: Likewise. * gcc.target/powerpc/sse2-movlpd-2.c: Likewise. * gcc.target/powerpc/sse2-movmskpd-1.c: Likewise. * gcc.target/powerpc/sse2-movq-1.c: Likewise. * gcc.target/powerpc/sse2-movq-2.c: Likewise. * gcc.target/powerpc/sse2-movq-3.c: Likewise. * gcc.target/powerpc/sse2-movsd-1.c: Likewise. * gcc.target/powerpc/sse2-movsd-2.c: Likewise. * gcc.target/powerpc/sse2-movsd-3.c: Likewise. * gcc.target/powerpc/sse2-mulpd-1.c: Likewise. * gcc.target/powerpc/sse2-mulsd-1.c: Likewise. * gcc.target/powerpc/sse2-orpd-1.c: Likewise. * gcc.target/powerpc/sse2-packssdw-1.c: Likewise. * gcc.target/powerpc/sse2-packsswb-1.c: Likewise. * gcc.target/powerpc/sse2-packuswb-1.c: Likewise. * gcc.target/powerpc/sse2-paddb-1.c: Likewise. * gcc.target/powerpc/sse2-paddd-1.c: Likewise. * gcc.target/powerpc/sse2-paddq-1.c: Likewise. * gcc.target/powerpc/sse2-paddsb-1.c: Likewise. * gcc.target/powerpc/sse2-paddsw-1.c: Likewise. * gcc.target/powerpc/sse2-paddusb-1.c: Likewise. * gcc.target/powerpc/sse2-paddusw-1.c: Likewise. * gcc.target/powerpc/sse2-paddw-1.c: Likewise. * gcc.target/powerpc/sse2-pand-1.c: Likewise. * gcc.target/powerpc/sse2-pandn-1.c: Likewise. * gcc.target/powerpc/sse2-pavgb-1.c: Likewise. * gcc.target/powerpc/sse2-pavgw-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpeqb-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpeqd-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpeqw-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpgtb-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpgtd-1.c: Likewise. * gcc.target/powerpc/sse2-pcmpgtw-1.c: Likewise. * gcc.target/powerpc/sse2-pextrw.c: Likewise. * gcc.target/powerpc/sse2-pinsrw.c: Likewise. * gcc.target/powerpc/sse2-pmaddwd-1.c: Likewise. * gcc.target/powerpc/sse2-pmaxsw-1.c: Likewise. * gcc.target/powerpc/sse2-pmaxub-1.c: Likewise. * gcc.target/powerpc/sse2-pminsw-1.c: Likewise. * gcc.target/powerpc/sse2-pminub-1.c: Likewise. * gcc.target/powerpc/sse2-pmovmskb-1.c: Likewise. * gcc.target/powerpc/sse2-pmulhuw-1.c: Likewise. * gcc.target/powerpc/sse2-pmulhw-1.c: Likewise. * gcc.target/powerpc/sse2-pmullw-1.c: Likewise. * gcc.target/powerpc/sse2-pmuludq-1.c: Likewise. * gcc.target/powerpc/sse2-por-1.c: Likewise. * gcc.target/powerpc/sse2-psadbw-1.c: Likewise. * gcc.target/powerpc/sse2-pshufd-1.c: Likewise. * gcc.target/powerpc/sse2-pshufhw-1.c: Likewise. * gcc.target/powerpc/sse2-pshuflw-1.c: Likewise. * gcc.target/powerpc/sse2-pslld-1.c: Likewise. * gcc.target/powerpc/sse2-pslld-2.c: Likewise. * gcc.target/powerpc/sse2-pslldq-1.c: Likewise. * gcc.target/powerpc/sse2-psllq-1.c: Likewise. * gcc.target/powerpc/sse2-psllq-2.c: Likewise. * gcc.target/powerpc/sse2-psllw-1.c: Likewise. * gcc.target/powerpc/sse2-psllw-2.c: Likewise. * gcc.target/powerpc/sse2-psrad-1.c: Likewise. * gcc.target/powerpc/sse2-psrad-2.c: Likewise. * gcc.target/powerpc/sse2-psraw-1.c: Likewise. * gcc.target/powerpc/sse2-psraw-2.c: Likewise. * gcc.target/powerpc/sse2-psrld-1.c: Likewise. * gcc.target/powerpc/sse2-psrld-2.c: Likewise. * gcc.target/powerpc/sse2-psrldq-1.c: Likewise. * gcc.target/powerpc/sse2-psrlq-1.c: Likewise. * gcc.target/powerpc/sse2-psrlq-2.c: Likewise. * gcc.target/powerpc/sse2-psrlw-1.c: Likewise. * gcc.target/powerpc/sse2-psrlw-2.c: Likewise. * gcc.target/powerpc/sse2-psubb-1.c: Likewise. * gcc.target/powerpc/sse2-psubd-1.c: Likewise. * gcc.target/powerpc/sse2-psubq-1.c: Likewise. * gcc.target/powerpc/sse2-psubsb-1.c: Likewise. * gcc.target/powerpc/sse2-psubsw-1.c: Likewise. * gcc.target/powerpc/sse2-psubusb-1.c: Likewise. * gcc.target/powerpc/sse2-psubusw-1.c: Likewise. * gcc.target/powerpc/sse2-psubw-1.c: Likewise. * gcc.target/powerpc/sse2-punpckhbw-1.c: Likewise. * gcc.target/powerpc/sse2-punpckhdq-1.c: Likewise. * gcc.target/powerpc/sse2-punpckhqdq-1.c: Likewise. * gcc.target/powerpc/sse2-punpckhwd-1.c: Likewise. * gcc.target/powerpc/sse2-punpcklbw-1.c: Likewise. * gcc.target/powerpc/sse2-punpckldq-1.c: Likewise. * gcc.target/powerpc/sse2-punpcklqdq-1.c: Likewise. * gcc.target/powerpc/sse2-punpcklwd-1.c: Likewise. * gcc.target/powerpc/sse2-pxor-1.c: Likewise. * gcc.target/powerpc/sse2-shufpd-1.c: Likewise. * gcc.target/powerpc/sse2-sqrtpd-1.c: Likewise. * gcc.target/powerpc/sse2-subpd-1.c: Likewise. * gcc.target/powerpc/sse2-subsd-1.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-1.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-2.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-3.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-4.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-5.c: Likewise. * gcc.target/powerpc/sse2-ucomisd-6.c: Likewise. * gcc.target/powerpc/sse2-unpckhpd-1.c: Likewise. * gcc.target/powerpc/sse2-unpcklpd-1.c: Likewise. * gcc.target/powerpc/sse2-xorpd-1.c: Likewise. * gcc.target/powerpc/sse3-addsubpd.c: Likewise. * gcc.target/powerpc/sse3-addsubps.c: Likewise. * gcc.target/powerpc/sse3-haddpd.c: Likewise. * gcc.target/powerpc/sse3-haddps.c: Likewise. * gcc.target/powerpc/sse3-hsubpd.c: Likewise. * gcc.target/powerpc/sse3-hsubps.c: Likewise. * gcc.target/powerpc/sse3-lddqu.c: Likewise. * gcc.target/powerpc/sse3-movddup.c: Likewise. * gcc.target/powerpc/sse3-movshdup.c: Likewise. * gcc.target/powerpc/sse3-movsldup.c: Likewise. * gcc.target/powerpc/sse4_1-blendpd.c: Likewise. * gcc.target/powerpc/sse4_1-blendps-2.c: Likewise. * gcc.target/powerpc/sse4_1-blendps.c: Likewise. * gcc.target/powerpc/sse4_1-blendvpd.c: Likewise. * gcc.target/powerpc/sse4_1-blendvps.c: Likewise. * gcc.target/powerpc/sse4_1-ceilpd.c: Likewise. * gcc.target/powerpc/sse4_1-ceilps.c: Likewise. * gcc.target/powerpc/sse4_1-ceilsd.c: Likewise. * gcc.target/powerpc/sse4_1-ceilss.c: Likewise. * gcc.target/powerpc/sse4_1-floorpd.c: Likewise. * gcc.target/powerpc/sse4_1-floorps.c: Likewise. * gcc.target/powerpc/sse4_1-floorsd.c: Likewise. * gcc.target/powerpc/sse4_1-floorss.c: Likewise. * gcc.target/powerpc/sse4_1-pblendvb.c: Likewise. * gcc.target/powerpc/sse4_1-pblendw-2.c: Likewise. * gcc.target/powerpc/sse4_1-pblendw.c: Likewise. * gcc.target/powerpc/sse4_1-pcmpeqq.c: Likewise. * gcc.target/powerpc/sse4_1-pinsrb.c: Likewise. * gcc.target/powerpc/sse4_1-pinsrd.c: Likewise. * gcc.target/powerpc/sse4_1-pinsrq.c: Likewise. * gcc.target/powerpc/sse4_1-pmovsxbq.c: Likewise. * gcc.target/powerpc/sse4_1-pmovsxdq.c: Likewise. * gcc.target/powerpc/sse4_1-pmovsxwq.c: Likewise. * gcc.target/powerpc/sse4_1-pmuldq.c: Likewise. * gcc.target/powerpc/sse4_1-ptest-1.c: Likewise. * gcc.target/powerpc/sse4_1-roundpd-2.c: Likewise. * gcc.target/powerpc/sse4_1-roundpd-3.c: Likewise. * gcc.target/powerpc/sse4_2-pcmpgtq.c: Likewise. * gcc.target/powerpc/ssse3-pabsb.c: Likewise. * gcc.target/powerpc/ssse3-pabsd.c: Likewise. * gcc.target/powerpc/ssse3-pabsw.c: Likewise. * gcc.target/powerpc/ssse3-palignr.c: Likewise. * gcc.target/powerpc/ssse3-phaddd.c: Likewise. * gcc.target/powerpc/ssse3-phaddsw.c: Likewise. * gcc.target/powerpc/ssse3-phaddw.c: Likewise. * gcc.target/powerpc/ssse3-phsubd.c: Likewise. * gcc.target/powerpc/ssse3-phsubsw.c: Likewise. * gcc.target/powerpc/ssse3-phsubw.c: Likewise. * gcc.target/powerpc/ssse3-pmaddubsw.c: Likewise. * gcc.target/powerpc/ssse3-pmulhrsw.c: Likewise. * gcc.target/powerpc/ssse3-pshufb.c: Likewise. * gcc.target/powerpc/ssse3-psignb.c: Likewise. * gcc.target/powerpc/ssse3-psignd.c: Likewise. * gcc.target/powerpc/ssse3-psignw.c: Likewise. * gcc.target/powerpc/vec-cmp-sel.c: Likewise. * gcc.target/powerpc/vec-sld-modulo.c: Likewise. * gcc.target/powerpc/vec-srad-modulo.c: Likewise. * gcc.target/powerpc/vec-srd-modulo.c: Likewise. * gcc.target/powerpc/amo1.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok, replace -mpower9-vector with -mvsx, and add dg-additional-options -mdejagnu-cpu=power9 if !has_arch_pwr9. * gcc.target/powerpc/amo2.c: Likewise. * gcc.target/powerpc/dform-1.c: Likewise. * gcc.target/powerpc/dform-2.c: Likewise. * gcc.target/powerpc/float128-5.c: Likewise. * gcc.target/powerpc/float128-complex-2.c: Likewise. * gcc.target/powerpc/float128-fma1.c: Likewise. * gcc.target/powerpc/float128-hw.c: Likewise. * gcc.target/powerpc/float128-hw10.c: Likewise. * gcc.target/powerpc/float128-hw11.c: Likewise. * gcc.target/powerpc/float128-hw2.c: Likewise. * gcc.target/powerpc/float128-hw3.c: Likewise. * gcc.target/powerpc/float128-hw4.c: Likewise. * gcc.target/powerpc/float128-hw5.c: Likewise. * gcc.target/powerpc/float128-hw6.c: Likewise. * gcc.target/powerpc/float128-hw7.c: Likewise. * gcc.target/powerpc/float128-hw8.c: Likewise. * gcc.target/powerpc/float128-hw9.c: Likewise. * gcc.target/powerpc/float128-minmax.c: Likewise. * gcc.target/powerpc/float128-odd.c: Likewise. * gcc.target/powerpc/float128-sqrt1.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-int.p9.c: Likewise. * gcc.target/powerpc/gnuattr2.c: Likewise. * gcc.target/powerpc/pr71656-1.c: Likewise. * gcc.target/powerpc/pr71656-2.c: Likewise. * gcc.target/powerpc/pr81959.c: Likewise. * gcc.target/powerpc/pr82748-1.c: Likewise. * gcc.target/powerpc/pr82748-2.c: Likewise. * gcc.target/powerpc/pr111449-2.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok. * gcc.target/powerpc/pr98914.c: Likewise. * gcc.target/powerpc/versioned-copy-loop.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok and append -mvsx to dg-options. * gcc.target/powerpc/clone2.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok. * gcc.target/powerpc/p9-options-1.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok, replace -mno-power9-vector with -mno-vsx. * gcc.target/powerpc/pr84226.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok and append -mvsx to dg-options. * g++.dg/pr69667.C: Replace powerpc_p8vector_ok with powerpc_vsx_ok and append -mvsx to dg-options. * gcc.dg/vect/costmodel/ppc/costmodel-slp-perm.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok and replace -mpower9-vector with -mvsx. * gcc.dg/vect/pr109011-1.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok, and replace -mpower8-vector with -mdejagnu-cpu=power8 -mvsx or -mvsx under different conditions. * gcc.dg/vect/pr109011-2.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok, and replace -mpower9-vector with -mdejagnu-cpu=power9 -mvsx or -mvsx under different conditions. * gcc.dg/vect/pr109011-4.c: Likewise. * gcc.dg/vect/pr109011-3.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok, and replace -mpower8-vector -mno-power9-vector with -mdejagnu-cpu=power8 -mvsx. * gcc.dg/vect/pr109011-5.c: Likewise. * gcc.target/powerpc/altivec-35.c: Remove -mno-power8-vector. * gcc.target/powerpc/vsx-vector-7.c: Replace -mno-power8-vector with -mdejagnu-cpu=power7. * gcc.dg/vect/O3-pr70130.c: Replace -mcpu=power7 with options -mdejagnu-cpu=power7 -mvsx and remove option -mno-power9-vector -mno-power8-vector. * gfortran.dg/vect/pr45714-b.f: Likewise. * gcc.dg/vect/pr48765.c: Remove dg-skip-if and replace -mcpu=power7 with option -mdejagnu-cpu=power6. * gcc.target/powerpc/pr78056-2.c: Likewise. * gcc.target/powerpc/altivec-2-runnable.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok, remove -mpower8-vector and add dg-additional-options -mdejagnu-cpu=power8 if !has_arch_pwr8. * gcc.target/powerpc/altivec-37.c: Likewise. * gcc.target/powerpc/fold-vec-abs-longlong-fwrapv.p8.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok and replace -mpower8-vector with -mvsx. * gcc.target/powerpc/fold-vec-abs-longlong.p8.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-char.p8.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-int.p8.c: Likewise. * gcc.target/powerpc/fold-vec-cmp-short.p8.c: Likewise. * gcc.target/powerpc/fold-vec-mergeeo-floatdouble.c: Likewise. * gcc.target/powerpc/fold-vec-mergeeo-int.c: Likewise. * gcc.target/powerpc/fold-vec-mergeeo-longlong.c: Likewise. * gcc.target/powerpc/fold-vec-mult-int128-p8.c: Likewise. * gcc.target/powerpc/fold-vec-neg-longlong.p8.c: Likewise. * gcc.target/powerpc/pr104124.c: Likewise. * gcc.target/powerpc/vec-cmpne-long.c: Likewise. * gcc.target/powerpc/pr86731-fwrapv-longlong.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok, replace -mpower8-vector with -mvsx and add dg-additional-options -mdejagnu-cpu=power8 if !has_arch_pwr8. * gcc.target/powerpc/pr80098-1.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok and replace -mno-power9-vector with -mno-vsx. * gcc.target/powerpc/pr80098-2.c: Replace powerpc_p8vector_ok with powerpc_vsx_ok and replace -mno-power8-vector with -mno-vsx. * gcc.target/powerpc/pragma_misc9.c: Replace powerpc_p9vector_ok with powerpc_vsx_ok.	2024-02-21 20:41:18 -06:00
Pan Li	3688c2b1a6	RISC-V: Upgrade RVV intrinsic version to 0.12 ... Upgrade the version of RVV intrinsic from 0.11 to 0.12. PR target/114017 gcc/ChangeLog: * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Upgrade the version to 0.12. gcc/testsuite/ChangeLog: * gcc.target/riscv/predef-__riscv_v_intrinsic.c: Update the version to 0.12. * gcc.target/riscv/rvv/base/pr114017-1.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>	2024-02-22 09:22:45 +08:00
Fangrui Song	9ca4c1bf08	RISC-V: Add tests for constraints "i" and "s" ... The constraints "i" and "s" can be used with a symbol that binds externally, e.g. ``` namespace ns { extern int var, a[4]; } void foo() { asm(".pushsection .xxx,\"aw\"; .dc.a %0; .popsection" :: "s"(&ns::var)); asm(".reloc ., BFD_RELOC_NONE, %0" :: "s"(&ns::a[3])); } ``` gcc/testsuite/ChangeLog: * gcc.target/riscv/asm-raw-symbol.c: New test.	2024-02-21 17:20:33 -08:00
GCC Administrator	98004ca00e	Daily bump.	2024-02-22 00:18:58 +00:00
Joseph Myers	a257671340	Update cpplib de.po ... * de.po: Update.	2024-02-21 23:26:15 +00:00
Edwin Lu	d7d79c466d	RISC-V: Enable assert for insn_has_dfa_reservation ... Enables assert that every typed instruction is associated with a dfa reservation gcc/ChangeLog: * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert Signed-off-by: Edwin Lu <ewlu@rivosinc.com>	2024-02-21 11:54:37 -08:00
Edwin Lu	bc6b42666c	RISC-V: Quick and simple fixes to testcases that break due to reordering ... The following test cases are easily fixed with small updates to the expected assembly order. Additionally make calling-convention testcases more robust PR target/113249 gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/calling-convention-1.c: Rearrange and adjust asm-checker times * gcc.target/riscv/rvv/autovec/vls/calling-convention-2.c: Ditto * gcc.target/riscv/rvv/autovec/vls/calling-convention-3.c: Ditto * gcc.target/riscv/rvv/autovec/vls/calling-convention-4.c: Ditto * gcc.target/riscv/rvv/autovec/vls/calling-convention-5.c: Ditto * gcc.target/riscv/rvv/autovec/vls/calling-convention-6.c: Ditto * gcc.target/riscv/rvv/autovec/vls/calling-convention-7.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-12.c: Rearrange assembly * gcc.target/riscv/rvv/base/binop_vx_constraint-16.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-17.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-19.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-21.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-23.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-25.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-27.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-29.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-31.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-33.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-35.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-4.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-40.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-44.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-8.c: Ditto * gcc.target/riscv/rvv/base/shift_vx_constraint-1.c: Ditto * gcc.target/riscv/rvv/vsetvl/avl_single-107.c: Change expected vsetvl Signed-off-by: Edwin Lu <ewlu@rivosinc.com>	2024-02-21 11:54:37 -08:00
Edwin Lu	67a29f99cc	RISC-V: Use default cost model for insn scheduling ... Use default cost model scheduling on these test cases. All these tests introduce scan dump failures with -mtune generic-ooo. Since the vector cost models are the same across all three tunes, some of the tests in PR113249 will be fixed with this patch series. PR target/113249 gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/bug-1.C: Use default scheduling * gcc.target/riscv/rvv/autovec/reduc/reduc_call-2.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-102.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-108.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-114.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-119.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-12.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-16.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-17.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-19.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-21.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-23.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-25.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-27.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-29.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-31.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-33.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-35.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-4.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-40.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-44.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-50.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-56.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-62.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-68.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-74.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-79.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-8.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-84.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-90.c: Ditto * gcc.target/riscv/rvv/base/binop_vx_constraint-96.c: Ditto * gcc.target/riscv/rvv/base/float-point-dynamic-frm-30.c: Ditto * gcc.target/riscv/rvv/base/pr108185-1.c: Ditto * gcc.target/riscv/rvv/base/pr108185-2.c: Ditto * gcc.target/riscv/rvv/base/pr108185-3.c: Ditto * gcc.target/riscv/rvv/base/pr108185-4.c: Ditto * gcc.target/riscv/rvv/base/pr108185-5.c: Ditto * gcc.target/riscv/rvv/base/pr108185-6.c: Ditto * gcc.target/riscv/rvv/base/pr108185-7.c: Ditto * gcc.target/riscv/rvv/base/shift_vx_constraint-1.c: Ditto * gcc.target/riscv/rvv/vsetvl/pr111037-3.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c: Ditto * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c: Ditto * gfortran.dg/vect/vect-8.f90: Ditto Signed-off-by: Edwin Lu <ewlu@rivosinc.com>	2024-02-21 11:54:37 -08:00
Edwin Lu	6ec84c45a1	RISC-V: Add vector related pipelines ... Creates new generic vector pipeline file common to all cpu tunes. Moves all vector related pipelines from generic-ooo to generic-vector-ooo. Creates new vector crypto related insn reservations. gcc/ChangeLog: * config/riscv/generic-ooo.md (generic_ooo): Move reservation (generic_ooo_vec_load): Ditto (generic_ooo_vec_store): Ditto (generic_ooo_vec_loadstore_seg): Ditto (generic_ooo_vec_alu): Ditto (generic_ooo_vec_fcmp): Ditto (generic_ooo_vec_imul): Ditto (generic_ooo_vec_fadd): Ditto (generic_ooo_vec_fmul): Ditto (generic_ooo_crypto): Ditto (generic_ooo_perm): Ditto (generic_ooo_vec_reduction): Ditto (generic_ooo_vec_ordered_reduction): Ditto (generic_ooo_vec_idiv): Ditto (generic_ooo_vec_float_divsqrt): Ditto (generic_ooo_vec_mask): Ditto (generic_ooo_vec_vesetvl): Ditto (generic_ooo_vec_setrm): Ditto (generic_ooo_vec_readlen): Ditto * config/riscv/riscv.md: Include generic-vector-ooo * config/riscv/generic-vector-ooo.md: New file. To here Signed-off-by: Edwin Lu <ewlu@rivosinc.com> Co-authored-by: Robin Dapp <rdapp.gcc@gmail.com>	2024-02-21 11:54:36 -08:00
Edwin Lu	57b95223cb	RISC-V: Add non-vector types to dfa pipelines ... This patch adds non-vector related insn reservations and updates/creates new insn reservations so all non-vector typed instructions have a reservation. gcc/ChangeLog: * config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation (generic_ooo_branch): Ditto * config/riscv/generic.md (generic_sfb_alu): Ditto (generic_fmul_half): Ditto * config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types * config/riscv/sifive-7.md (sifive_7_hfma): Add reservation (sifive_7_popcount): Ditto * config/riscv/sifive-p400.md (sifive_p400_clmul): Ditto * config/riscv/sifive-p600.md (sifive_p600_clmul): Ditto * config/riscv/vector.md: Change rdfrm to fmove * config/riscv/zc.md: Change pushpop to load/store Signed-off-by: Edwin Lu <ewlu@rivosinc.com>	2024-02-21 11:54:36 -08:00
Jonathan Wakely	f5964f1a35	doc: Fix typos in -Wmismatched-dealloc docs ... gcc/ChangeLog: * doc/invoke.texi (Warning Options): Fix typos.	2024-02-21 19:50:49 +00:00
Edwin Lu	3232ebd91e	RISC-V: Specify mtune and march for PR113742 ... The testcase pr113742.c is failing for 32 bit targets due to the following cc1 error: cc1: error: ABI requries '-march=rv64' Specify '-march=rv64gc' with '-mtune=sifive-p600-series' PR target/113742 gcc/testsuite/ChangeLog: * gcc.target/riscv/pr113742.c: change mcpu to mtune and add march Signed-off-by: Edwin Lu <ewlu@rivosinc.com>	2024-02-21 09:40:05 -08:00
David Faust	5772ea772d	bpf: add inline memmove and memcpy expansion ... BPF programs are not typically linked, which means we cannot fall back on library calls to implement __builtin_{memmove,memcpy} and should always expand them inline if possible. GCC already successfully expands these builtins inline in many cases, but failed to do so for a few for simple cases involving overlapping memmove in the kernel BPF selftests and was instead emitting a libcall. This patch implements a simple inline expansion of memcpy and memmove in the BPF backend in a verifier-friendly way, with the caveat that the size must be an integer constant, which is also required by clang. gcc/ * config/bpf/bpf-protos.h (bpf_expand_cpymem): New. * config/bpf/bpf.cc: (emit_move_loop, bpf_expand_cpymem): New. * config/bpf/bpf.md: (cpymemdi, movmemdi): New define_expands. gcc/testsuite/ * gcc.target/bpf/memcpy-1.c: New test. * gcc.target/bpf/memmove-1.c: New test. * gcc.target/bpf/memmove-2.c: New test.	2024-02-21 08:36:07 -08:00
Gaius Mulley	161a67b2be	PR modula2/114026 Incorrect location during for loop type checking ... If a for loop contains an incompatible type expression between the designator and the second expression then the location used when generating the error message is set to token 0. The bug is fixed by extending the range checking InitForLoopBeginRangeCheck. The range checking is processed after all types, constants have been resolved (and converted into gcc trees). The range check will check for assignment compatibility between des and expr1, expression compatibility between des and expr2. Separate token positions for des, exp1, expr2 and by are stored in the Range record and used to create virtual tokens if they are on the same source line. gcc/m2/ChangeLog: PR modula2/114026 * gm2-compiler/M2GenGCC.mod (Import): Remove DisplayQuadruples. Remove DisplayQuadList. (MixTypesBinary): Replace check with overflowCheck. New variable typeChecking. Use GenQuadOTypetok to retrieve typeChecking. Use typeChecking to suppress error message. * gm2-compiler/M2LexBuf.def (MakeVirtual2Tok): New procedure function. * gm2-compiler/M2LexBuf.mod (MakeVirtualTok): Improve comment. (MakeVirtual2Tok): New procedure function. * gm2-compiler/M2Quads.def (GetQuadOTypetok): New procedure. * gm2-compiler/M2Quads.mod (QuadFrame): New field CheckType. (PutQuadO): Rewrite using PutQuadOType. (PutQuadOType): New procedure. (GetQuadOTypetok): New procedure. (BuildPseudoBy): Rewrite. (BuildForToByDo): Remove type checking. Add parameters e2, e2tok, BySym, bytok to InitForLoopBeginRange. Push the RangeId. (BuildEndFor): Pop the RangeId. Use GenQuadOTypetok to generate AddOp without type checking. Call PutRangeForIncrement with the RangeId and IncQuad. (GenQuadOtok): Rewrite using GenQuadOTypetok. (GenQuadOTypetok): New procedure. * gm2-compiler/M2Range.def (InitForLoopBeginRangeCheck): Rename d as des, e as expr. Add expr1, expr1tok, expr2, expr2tok, byconst, byconsttok parameters. (PutRangeForIncrement): New procedure. * gm2-compiler/M2Range.mod (Import): MakeVirtual2Tok. (Range): Add expr2, byconst, destok, exprtok, expr2tok, incrementquad. (InitRange): Initialize expr2 to NulSym. Initialize byconst to NulSym. Initialize tokenNo, destok, exprtok, expr2tok, byconst to UnknownTokenNo. Initialize incrementquad to 0. (PutRangeForIncrement): New procedure. (PutRangeDesExpr2): New procedure. (InitForLoopBeginRangeCheck): Rewrite. (ForLoopBeginTypeCompatible): New procedure function. (CodeForLoopBegin): Call ForLoopBeginTypeCompatible and only code the for loop assignment if all the type checks succeed. gcc/testsuite/ChangeLog: PR modula2/114026 * gm2/extensions/run/pass/callingc10.mod: New test. * gm2/extensions/run/pass/callingc11.mod: New test. * gm2/extensions/run/pass/callingc9.mod: New test. * gm2/extensions/run/pass/strconst.def: New test. * gm2/pim/fail/forloop.mod: New test. * gm2/pim/pass/forloop2.mod: New test. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>	2024-02-21 16:21:05 +00:00
Martin Jambor	c8742849e2	ipa: Convert lattices from pure array to vector (PR 113476) ... In PR 113476 we have discovered that ipcp_param_lattices is no longer a POD and should be destructed. In a follow-up discussion it transpired that their initialization done by memsetting their backing memory to zero is also invalid because now any write there before construction can be considered dead. Plus that having them in an array is a little bit old-school and does not get the extra checking offered by vector along with automatic construction and destruction when necessary. So this patch converts the array to a vector. That however means that ipcp_param_lattices cannot be just a forward declared type but must be known to all code that deals with ipa_node_params and thus to all code that includes ipa-prop.h. Therefore I have moved ipcp_param_lattices and the type it depends on to a new header ipa-cp.h which now ipa-prop.h depends on. Because we have the (IMHO not a very wise) rule that headers don't include what they need themselves, I had to add inclusions of ipa-cp.h and sreal.h (on which it depends) to very many files, which made the patch rather ugly. gcc/lto/ChangeLog: 2024-02-16 Martin Jambor <mjambor@suse.cz> PR ipa/113476 * lto-common.cc: Include sreal.h and ipa-cp.h. * lto-partition.cc: Include ipa-cp.h, move inclusion of sreal higher. * lto.cc: Include sreal.h and ipa-cp.h. gcc/ChangeLog: 2024-02-16 Martin Jambor <mjambor@suse.cz> PR ipa/113476 * ipa-prop.h (ipa_node_params): Convert lattices to a vector, adjust initializers in the contructor. (ipa_node_params::~ipa_node_params): Release lattices as a vector. * ipa-cp.h: New file. * ipa-cp.cc: Include sreal.h and ipa-cp.h. (ipcp_value_source): Move to ipa-cp.h. (ipcp_value_base): Likewise. (ipcp_value): Likewise. (ipcp_lattice): Likewise. (ipcp_agg_lattice): Likewise. (ipcp_bits_lattice): Likewise. (ipcp_vr_lattice): Likewise. (ipcp_param_lattices): Likewise. (ipa_get_parm_lattices): Remove assert latticess is non-NULL. (ipa_value_from_jfunc): Adjust a check for empty lattices. (ipa_context_from_jfunc): Likewise. (ipa_agg_value_from_jfunc): Likewise. (merge_agg_lats_step): Do not memset new aggregate lattices to zero. (ipcp_propagate_stage): Allocate lattices in a vector as opposed to just in contiguous memory. (ipcp_store_vr_results): Adjust a check for empty lattices. * auto-profile.cc: Include sreal.h and ipa-cp.h. * cgraph.cc: Likewise. * cgraphclones.cc: Likewise. * cgraphunit.cc: Likewise. * config/aarch64/aarch64.cc: Likewise. * config/i386/i386-builtins.cc: Likewise. * config/i386/i386-expand.cc: Likewise. * config/i386/i386-features.cc: Likewise. * config/i386/i386-options.cc: Likewise. * config/i386/i386.cc: Likewise. * config/rs6000/rs6000.cc: Likewise. * config/s390/s390.cc: Likewise. * gengtype.cc (open_base_files): Added sreal.h and ipa-cp.h to the files to be included in gtype-desc.cc. * gimple-range-fold.cc: Include sreal.h and ipa-cp.h. * ipa-devirt.cc: Likewise. * ipa-fnsummary.cc: Likewise. * ipa-icf.cc: Likewise. * ipa-inline-analysis.cc: Likewise. * ipa-inline-transform.cc: Likewise. * ipa-inline.cc: Include ipa-cp.h, move inclusion of sreal.h higher. * ipa-modref.cc: Include sreal.h and ipa-cp.h. * ipa-param-manipulation.cc: Likewise. * ipa-predicate.cc: Likewise. * ipa-profile.cc: Likewise. * ipa-prop.cc: Likewise. (ipa_node_params_t::duplicate): Assert new lattices remain empty instead of setting them to NULL. * ipa-pure-const.cc: Include sreal.h and ipa-cp.h. * ipa-split.cc: Likewise. * ipa-sra.cc: Likewise. * ipa-strub.cc: Likewise. * ipa-utils.cc: Likewise. * ipa.cc: Likewise. * toplev.cc: Likewise. * tree-ssa-ccp.cc: Likewise. * tree-ssa-sccvn.cc: Likewise. * tree-vrp.cc: Likewise.	2024-02-21 15:43:17 +01:00
Sahil Yeole	767698ff6c	Update copyright years. ... Signed-off-by: Sahil Yeole <sahilyeole93@gmail.com>	2024-02-21 13:51:26 +01:00
0xn4utilus	e7c1948fbc	gccrs: Add variadic check on function params ... gcc/rust/ChangeLog: * checks/errors/rust-ast-validation.cc (ASTValidation::visit): Add variadic check on all parameters. gcc/testsuite/ChangeLog: * rust/compile/issue-2850.rs: New test. Signed-off-by: 0xn4utilus <gyanendrabanjare8@gmail.com>	2024-02-21 13:51:26 +01:00
Owen Avery	cdd7638241	gccrs: Fix lookup of TuplePattern sub-pattern types ... gcc/rust/ChangeLog: * backend/rust-compile-pattern.cc (CompilePatternLet::visit): Lookup type of sub-pattern, not tuple pattern itself. gcc/testsuite/ChangeLog: * rust/compile/issue-2847-b.rs: New test. Signed-off-by: Owen Avery <powerboat9.gamer@gmail.com>	2024-02-21 13:51:26 +01:00
Marc Poulhiès	d7dde4ba49	gccrs: add powi intrinsics ... gcc/rust/ChangeLog: * backend/rust-builtins.cc (BuiltinsContext::register_rust_mappings): Add powi and reformat. * backend/rust-builtins.h: Add missing copyright header. gcc/testsuite/ChangeLog: * rust/compile/torture/intrinsics-math.rs: Adjust pow test, add test for powi. Signed-off-by: Marc Poulhiès <dkm@kataplop.net>	2024-02-21 13:51:26 +01:00
Arthur Cohen	6c6e357b17	gccrs: Add testcase for #[rustc_const_stable] ... To ensure we don't introduce regressions back to issue #2314 gcc/testsuite/ChangeLog: * rust/compile/rustc_const_stable.rs: New test.	2024-02-21 13:51:26 +01:00
Arthur Cohen	f8dad5a80c	gccrs: expand: Fix formatting for "macro not found" error ... gcc/rust/ChangeLog: * expand/rust-macro-expand.h (struct MacroExpander): Nitpick: fix formatting of emitted error.	2024-02-21 13:51:26 +01:00
Owen Avery	17a7fd17b7	gccrs: Fix rebinding imports ... gcc/rust/ChangeLog: * resolve/rust-ast-resolve-item.cc (flatten_glob): Use Import class. (flatten_rebind): Likewise. (flatten_list): Likewise. (flatten): Likewise. (flatten_use_dec_to_paths): Likewise. (flatten_use_dec_to_imports): Likewise. (ResolveItem::visit): Likewise. (Import::add_prefix): New. (rust_flatten_nested_glob): Adjust test. (rust_flatten_glob): Likewise. (rust_flatten_rebind_none): Likewise. (rust_flatten_rebind): Likewise. (rust_flatten_rebind_nested): Likewise. (rust_flatten_list): Likewise. * resolve/rust-ast-resolve-item.h (class Import): New. gcc/testsuite/ChangeLog: * rust/compile/use_2.rs: New test. Signed-off-by: Owen Avery <powerboat9.gamer@gmail.com>	2024-02-21 13:51:25 +01:00
Arthur Cohen	4cabeacc38	gccrs: Add testcase for matches!() macro ... This adds a testcase for issue #2129. gcc/testsuite/ChangeLog: * rust/execute/torture/matches_macro.rs: New test.	2024-02-21 13:51:25 +01:00
Arthur Cohen	8534cc772d	gccrs: Fix typo in RegionConstraints instance ... gcc/rust/ChangeLog: * typecheck/rust-hir-type-check-implitem.h: Fix typo in field (region_costraints -> region_constraints).	2024-02-21 13:51:25 +01:00
Tamar Christina	d0f8cb17bb	AArch64: remove ls64 from being mandatory on armv8.7-a.. ... The Arm Architectural Reference Manual (Version J.a, section A2.9 on FEAT_LS64) shows that ls64 is an optional extensions and should not be enabled by default for Armv8.7-a. This drops it from the mandatory bits for the architecture and brings GCC inline with LLVM and the achitecture. Note that we will not be changing binutils to preserve compatibility with older released compilers. gcc/ChangeLog: * config/aarch64/aarch64-arches.def (AARCH64_ARCH): Remove LS64 from Armv8.7-a. gcc/testsuite/ChangeLog: * g++.target/aarch64/acle/ls64.C: Add +ls64. * g++.target/aarch64/acle/ls64_lto.C: Likewise. * gcc.target/aarch64/acle/ls64_lto.c: Likewise. * gcc.target/aarch64/acle/pr110100.c: Likewise. * gcc.target/aarch64/acle/pr110132.c: Likewise. * gcc.target/aarch64/options_set_28.c: Drop check for nols64. * gcc.target/aarch64/pragma_cpp_predefs_2.c: Correct header checks.	2024-02-21 11:42:53 +00:00
Tamar Christina	c8c587b854	AArch64: skip modes_1.f90 [PR107071] ... This test has never worked on AArch64 since the day it was committed. It has a number of issues that prevent it from working on AArch64: The testfailures seem to be known and triaged, so until that's fixed there's no point in running this test. gcc/testsuite/ChangeLog: PR fortran/107071 * gfortran.dg/ieee/modes_1.f90: skip aarch64, arm.	2024-02-21 11:42:13 +00:00
Richard Sandiford	38004cf869	aarch64: More SME vs -mtrack-speculation ... The sequence to commit a lazy save includes a branch based on whether TPIDR2_EL0 is zero. The code assumed that CBZ could be used for this, but that instruction is forbidden when -mtrack-speculation is being used. gcc/ * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state): Use aarch64_gen_compare_zero_and_branch rather than emitting a CBZ directly. gcc/testsuite/ * gcc.target/aarch64/sme/locally_streaming_1_ts.c: New test. * gcc.target/aarch64/sme/sibcall_7_ts.c: Likewise.	2024-02-21 11:12:29 +00:00
Richard Sandiford	3651b1b23f	aarch64: Remove duplicated call ... I noticed while working on another patch that we had a duplicated call to aarch64_process_target_attr. gcc/ * config/aarch64/aarch64.cc (aarch64_option_valid_attribute_p): Remove duplicated call.	2024-02-21 11:12:29 +00:00
Richard Sandiford	6d56f59048	aarch64: Fix sibcalls involving shared-ZT0 functions ... In: void bar() __arm_inout("za"); void foo() __arm_inout("za", "zt0") { bar(); } foo cannot tail-call bar because foo needs to restore ZT0 after the call. I'd forgotten to update the ok_for_sibcall rules to handle this when adding SME2. Thanks to Sander de Smalen for the spot. gcc/ * config/aarch64/aarch64.cc (aarch64_function_ok_for_sibcall): Check that each individual piece of state is shared in the same way, rather than using an aggregate check for PSTATE.ZA. gcc/testsuite/ * gcc.target/aarch64/sme/sibcall_9.c: New test.	2024-02-21 11:12:28 +00:00
Richard Sandiford	22f0cf36ec	aarch64: Ensure ZT0 is zeroed in a new-ZT0 function ... ACLE guarantees that a function like: __arm_new("zt0") foo() { ... } will start with ZT0 equal to zero. I'd forgotten to enforce that after commiting a lazy save. After such a save, we should zero ZA iff the function has ZA state and zero ZT0 iff the function has ZT0 state. gcc/ * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state): In the code that commits a lazy save, only zero ZA if the function has ZA state. Similarly zero ZT0 if the function has ZT0 state. gcc/testsuite/ * gcc.target/aarch64/sme/zt0_state_5.c (test3): Expect ZT0 rather than ZA to be zeroed. (test5): Remove zeroing of ZA.	2024-02-21 11:12:28 +00:00