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The hardware DMA limit might not be power of 2. When RAM range starts above 0, say 4GB, DMA limit of 30 bits should end at 5GB. A single high bit can not encode this limit. Use a plain address for the DMA zone limit instead. Since the DMA zone can now potentially span beyond 4GB physical limit of DMA32, make sure to use DMA zone for GFP_DMA32 allocations in that case. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Co-developed-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Petr Tesarik <ptesarik@suse.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
296 lines
7.5 KiB
C
296 lines
7.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2012 ARM Ltd.
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* Copyright (C) 2020 Google LLC
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*/
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#include <linux/cma.h>
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#include <linux/debugfs.h>
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#include <linux/dma-map-ops.h>
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#include <linux/dma-direct.h>
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#include <linux/init.h>
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#include <linux/genalloc.h>
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#include <linux/set_memory.h>
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#include <linux/slab.h>
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#include <linux/workqueue.h>
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static struct gen_pool *atomic_pool_dma __ro_after_init;
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static unsigned long pool_size_dma;
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static struct gen_pool *atomic_pool_dma32 __ro_after_init;
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static unsigned long pool_size_dma32;
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static struct gen_pool *atomic_pool_kernel __ro_after_init;
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static unsigned long pool_size_kernel;
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/* Size can be defined by the coherent_pool command line */
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static size_t atomic_pool_size;
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/* Dynamic background expansion when the atomic pool is near capacity */
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static struct work_struct atomic_pool_work;
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static int __init early_coherent_pool(char *p)
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{
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atomic_pool_size = memparse(p, &p);
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return 0;
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}
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early_param("coherent_pool", early_coherent_pool);
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static void __init dma_atomic_pool_debugfs_init(void)
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{
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struct dentry *root;
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root = debugfs_create_dir("dma_pools", NULL);
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debugfs_create_ulong("pool_size_dma", 0400, root, &pool_size_dma);
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debugfs_create_ulong("pool_size_dma32", 0400, root, &pool_size_dma32);
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debugfs_create_ulong("pool_size_kernel", 0400, root, &pool_size_kernel);
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}
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static void dma_atomic_pool_size_add(gfp_t gfp, size_t size)
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{
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if (gfp & __GFP_DMA)
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pool_size_dma += size;
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else if (gfp & __GFP_DMA32)
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pool_size_dma32 += size;
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else
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pool_size_kernel += size;
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}
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static bool cma_in_zone(gfp_t gfp)
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{
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unsigned long size;
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phys_addr_t end;
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struct cma *cma;
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cma = dev_get_cma_area(NULL);
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if (!cma)
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return false;
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size = cma_get_size(cma);
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if (!size)
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return false;
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/* CMA can't cross zone boundaries, see cma_activate_area() */
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end = cma_get_base(cma) + size - 1;
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if (IS_ENABLED(CONFIG_ZONE_DMA) && (gfp & GFP_DMA))
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return end <= zone_dma_limit;
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if (IS_ENABLED(CONFIG_ZONE_DMA32) && (gfp & GFP_DMA32))
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return end <= max(DMA_BIT_MASK(32), zone_dma_limit);
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return true;
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}
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static int atomic_pool_expand(struct gen_pool *pool, size_t pool_size,
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gfp_t gfp)
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{
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unsigned int order;
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struct page *page = NULL;
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void *addr;
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int ret = -ENOMEM;
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/* Cannot allocate larger than MAX_PAGE_ORDER */
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order = min(get_order(pool_size), MAX_PAGE_ORDER);
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do {
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pool_size = 1 << (PAGE_SHIFT + order);
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if (cma_in_zone(gfp))
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page = dma_alloc_from_contiguous(NULL, 1 << order,
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order, false);
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if (!page)
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page = alloc_pages(gfp, order);
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} while (!page && order-- > 0);
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if (!page)
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goto out;
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arch_dma_prep_coherent(page, pool_size);
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#ifdef CONFIG_DMA_DIRECT_REMAP
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addr = dma_common_contiguous_remap(page, pool_size,
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pgprot_dmacoherent(PAGE_KERNEL),
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__builtin_return_address(0));
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if (!addr)
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goto free_page;
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#else
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addr = page_to_virt(page);
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#endif
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/*
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* Memory in the atomic DMA pools must be unencrypted, the pools do not
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* shrink so no re-encryption occurs in dma_direct_free().
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*/
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ret = set_memory_decrypted((unsigned long)page_to_virt(page),
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1 << order);
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if (ret)
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goto remove_mapping;
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ret = gen_pool_add_virt(pool, (unsigned long)addr, page_to_phys(page),
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pool_size, NUMA_NO_NODE);
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if (ret)
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goto encrypt_mapping;
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dma_atomic_pool_size_add(gfp, pool_size);
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return 0;
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encrypt_mapping:
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ret = set_memory_encrypted((unsigned long)page_to_virt(page),
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1 << order);
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if (WARN_ON_ONCE(ret)) {
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/* Decrypt succeeded but encrypt failed, purposely leak */
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goto out;
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}
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remove_mapping:
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#ifdef CONFIG_DMA_DIRECT_REMAP
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dma_common_free_remap(addr, pool_size);
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free_page:
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__free_pages(page, order);
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#endif
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out:
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return ret;
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}
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static void atomic_pool_resize(struct gen_pool *pool, gfp_t gfp)
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{
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if (pool && gen_pool_avail(pool) < atomic_pool_size)
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atomic_pool_expand(pool, gen_pool_size(pool), gfp);
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}
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static void atomic_pool_work_fn(struct work_struct *work)
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{
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if (IS_ENABLED(CONFIG_ZONE_DMA))
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atomic_pool_resize(atomic_pool_dma,
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GFP_KERNEL | GFP_DMA);
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if (IS_ENABLED(CONFIG_ZONE_DMA32))
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atomic_pool_resize(atomic_pool_dma32,
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GFP_KERNEL | GFP_DMA32);
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atomic_pool_resize(atomic_pool_kernel, GFP_KERNEL);
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}
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static __init struct gen_pool *__dma_atomic_pool_init(size_t pool_size,
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gfp_t gfp)
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{
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struct gen_pool *pool;
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int ret;
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pool = gen_pool_create(PAGE_SHIFT, NUMA_NO_NODE);
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if (!pool)
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return NULL;
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gen_pool_set_algo(pool, gen_pool_first_fit_order_align, NULL);
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ret = atomic_pool_expand(pool, pool_size, gfp);
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if (ret) {
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gen_pool_destroy(pool);
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pr_err("DMA: failed to allocate %zu KiB %pGg pool for atomic allocation\n",
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pool_size >> 10, &gfp);
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return NULL;
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}
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pr_info("DMA: preallocated %zu KiB %pGg pool for atomic allocations\n",
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gen_pool_size(pool) >> 10, &gfp);
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return pool;
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}
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static int __init dma_atomic_pool_init(void)
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{
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int ret = 0;
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/*
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* If coherent_pool was not used on the command line, default the pool
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* sizes to 128KB per 1GB of memory, min 128KB, max MAX_PAGE_ORDER.
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*/
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if (!atomic_pool_size) {
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unsigned long pages = totalram_pages() / (SZ_1G / SZ_128K);
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pages = min_t(unsigned long, pages, MAX_ORDER_NR_PAGES);
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atomic_pool_size = max_t(size_t, pages << PAGE_SHIFT, SZ_128K);
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}
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INIT_WORK(&atomic_pool_work, atomic_pool_work_fn);
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atomic_pool_kernel = __dma_atomic_pool_init(atomic_pool_size,
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GFP_KERNEL);
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if (!atomic_pool_kernel)
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ret = -ENOMEM;
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if (has_managed_dma()) {
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atomic_pool_dma = __dma_atomic_pool_init(atomic_pool_size,
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GFP_KERNEL | GFP_DMA);
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if (!atomic_pool_dma)
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ret = -ENOMEM;
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}
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if (IS_ENABLED(CONFIG_ZONE_DMA32)) {
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atomic_pool_dma32 = __dma_atomic_pool_init(atomic_pool_size,
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GFP_KERNEL | GFP_DMA32);
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if (!atomic_pool_dma32)
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ret = -ENOMEM;
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}
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dma_atomic_pool_debugfs_init();
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return ret;
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}
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postcore_initcall(dma_atomic_pool_init);
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static inline struct gen_pool *dma_guess_pool(struct gen_pool *prev, gfp_t gfp)
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{
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if (prev == NULL) {
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if (IS_ENABLED(CONFIG_ZONE_DMA32) && (gfp & GFP_DMA32))
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return atomic_pool_dma32;
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if (atomic_pool_dma && (gfp & GFP_DMA))
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return atomic_pool_dma;
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return atomic_pool_kernel;
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}
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if (prev == atomic_pool_kernel)
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return atomic_pool_dma32 ? atomic_pool_dma32 : atomic_pool_dma;
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if (prev == atomic_pool_dma32)
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return atomic_pool_dma;
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return NULL;
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}
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static struct page *__dma_alloc_from_pool(struct device *dev, size_t size,
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struct gen_pool *pool, void **cpu_addr,
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bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t))
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{
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unsigned long addr;
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phys_addr_t phys;
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addr = gen_pool_alloc(pool, size);
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if (!addr)
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return NULL;
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phys = gen_pool_virt_to_phys(pool, addr);
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if (phys_addr_ok && !phys_addr_ok(dev, phys, size)) {
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gen_pool_free(pool, addr, size);
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return NULL;
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}
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if (gen_pool_avail(pool) < atomic_pool_size)
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schedule_work(&atomic_pool_work);
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*cpu_addr = (void *)addr;
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memset(*cpu_addr, 0, size);
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return pfn_to_page(__phys_to_pfn(phys));
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}
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struct page *dma_alloc_from_pool(struct device *dev, size_t size,
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void **cpu_addr, gfp_t gfp,
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bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t))
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{
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struct gen_pool *pool = NULL;
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struct page *page;
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while ((pool = dma_guess_pool(pool, gfp))) {
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page = __dma_alloc_from_pool(dev, size, pool, cpu_addr,
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phys_addr_ok);
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if (page)
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return page;
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}
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WARN(1, "Failed to get suitable pool for %s\n", dev_name(dev));
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return NULL;
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}
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bool dma_free_from_pool(struct device *dev, void *start, size_t size)
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{
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struct gen_pool *pool = NULL;
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while ((pool = dma_guess_pool(pool, 0))) {
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if (!gen_pool_has_addr(pool, (unsigned long)start, size))
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continue;
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gen_pool_free(pool, (unsigned long)start, size);
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return true;
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}
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return false;
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}
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