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f383b07706
Add dt binding header for resets lines in Mediatek MT7621 SoCs. Acked-by: Rob Herring <robh@kernel.org> Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20220110114930.1406665-2-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
38 lines
993 B
C
38 lines
993 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2021 Sergio Paracuellos
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* Author: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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*/
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#ifndef DT_BINDING_MT7621_RESET_H
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#define DT_BINDING_MT7621_RESET_H
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#define MT7621_RST_SYS 0
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#define MT7621_RST_MCM 2
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#define MT7621_RST_HSDMA 5
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#define MT7621_RST_FE 6
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#define MT7621_RST_SPDIFTX 7
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#define MT7621_RST_TIMER 8
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#define MT7621_RST_INT 9
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#define MT7621_RST_MC 10
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#define MT7621_RST_PCM 11
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#define MT7621_RST_PIO 13
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#define MT7621_RST_GDMA 14
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#define MT7621_RST_NFI 15
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#define MT7621_RST_I2C 16
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#define MT7621_RST_I2S 17
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#define MT7621_RST_SPI 18
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#define MT7621_RST_UART1 19
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#define MT7621_RST_UART2 20
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#define MT7621_RST_UART3 21
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#define MT7621_RST_ETH 23
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#define MT7621_RST_PCIE0 24
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#define MT7621_RST_PCIE1 25
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#define MT7621_RST_PCIE2 26
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#define MT7621_RST_AUX_STCK 28
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#define MT7621_RST_CRYPTO 29
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#define MT7621_RST_SDXC 30
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#define MT7621_RST_PPE 31
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#endif /* DT_BINDING_MT7621_RESET_H */
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