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5a7144d61d
Add bindings for the gate clocks of RP subsystem for Sophgo SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Rob Herring <robh@kernel.org>
59 lines
1.5 KiB
C
59 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
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/*
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* Copyright (C) 2023 Sophgo Technology Inc. All rights reserved.
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*/
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#ifndef __DT_BINDINGS_SOPHGO_SG2042_RPGATE_H__
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#define __DT_BINDINGS_SOPHGO_SG2042_RPGATE_H__
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#define GATE_CLK_RXU0 0
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#define GATE_CLK_RXU1 1
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#define GATE_CLK_RXU2 2
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#define GATE_CLK_RXU3 3
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#define GATE_CLK_RXU4 4
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#define GATE_CLK_RXU5 5
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#define GATE_CLK_RXU6 6
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#define GATE_CLK_RXU7 7
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#define GATE_CLK_RXU8 8
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#define GATE_CLK_RXU9 9
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#define GATE_CLK_RXU10 10
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#define GATE_CLK_RXU11 11
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#define GATE_CLK_RXU12 12
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#define GATE_CLK_RXU13 13
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#define GATE_CLK_RXU14 14
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#define GATE_CLK_RXU15 15
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#define GATE_CLK_RXU16 16
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#define GATE_CLK_RXU17 17
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#define GATE_CLK_RXU18 18
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#define GATE_CLK_RXU19 19
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#define GATE_CLK_RXU20 20
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#define GATE_CLK_RXU21 21
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#define GATE_CLK_RXU22 22
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#define GATE_CLK_RXU23 23
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#define GATE_CLK_RXU24 24
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#define GATE_CLK_RXU25 25
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#define GATE_CLK_RXU26 26
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#define GATE_CLK_RXU27 27
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#define GATE_CLK_RXU28 28
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#define GATE_CLK_RXU29 29
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#define GATE_CLK_RXU30 30
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#define GATE_CLK_RXU31 31
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#define GATE_CLK_MP0 32
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#define GATE_CLK_MP1 33
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#define GATE_CLK_MP2 34
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#define GATE_CLK_MP3 35
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#define GATE_CLK_MP4 36
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#define GATE_CLK_MP5 37
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#define GATE_CLK_MP6 38
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#define GATE_CLK_MP7 39
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#define GATE_CLK_MP8 40
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#define GATE_CLK_MP9 41
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#define GATE_CLK_MP10 42
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#define GATE_CLK_MP11 43
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#define GATE_CLK_MP12 44
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#define GATE_CLK_MP13 45
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#define GATE_CLK_MP14 46
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#define GATE_CLK_MP15 47
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#endif /* __DT_BINDINGS_SOPHGO_SG2042_RPGATE_H__ */
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