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6ec3f5ec2e
Add OF ID match table. Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/lkml/20230601054549.10843-12-nikita.shubin@maquefel.me/ Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Link: https://lore.kernel.org/r/20230823-m48t86_device_tree-v2-2-21ff275f949d@maquefel.me Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
293 lines
7.6 KiB
C
293 lines
7.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* ST M48T86 / Dallas DS12887 RTC driver
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* Copyright (c) 2006 Tower Technologies
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*
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* Author: Alessandro Zummo <a.zummo@towertech.it>
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*
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* This drivers only supports the clock running in BCD and 24H mode.
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* If it will be ever adapted to binary and 12H mode, care must be taken
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* to not introduce bugs.
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*/
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/rtc.h>
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#include <linux/platform_device.h>
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#include <linux/bcd.h>
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#include <linux/io.h>
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#define M48T86_SEC 0x00
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#define M48T86_SECALRM 0x01
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#define M48T86_MIN 0x02
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#define M48T86_MINALRM 0x03
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#define M48T86_HOUR 0x04
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#define M48T86_HOURALRM 0x05
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#define M48T86_DOW 0x06 /* 1 = sunday */
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#define M48T86_DOM 0x07
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#define M48T86_MONTH 0x08 /* 1 - 12 */
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#define M48T86_YEAR 0x09 /* 0 - 99 */
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#define M48T86_A 0x0a
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#define M48T86_B 0x0b
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#define M48T86_B_SET BIT(7)
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#define M48T86_B_DM BIT(2)
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#define M48T86_B_H24 BIT(1)
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#define M48T86_C 0x0c
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#define M48T86_D 0x0d
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#define M48T86_D_VRT BIT(7)
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#define M48T86_NVRAM(x) (0x0e + (x))
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#define M48T86_NVRAM_LEN 114
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struct m48t86_rtc_info {
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void __iomem *index_reg;
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void __iomem *data_reg;
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struct rtc_device *rtc;
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};
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static unsigned char m48t86_readb(struct device *dev, unsigned long addr)
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{
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struct m48t86_rtc_info *info = dev_get_drvdata(dev);
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unsigned char value;
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writeb(addr, info->index_reg);
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value = readb(info->data_reg);
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return value;
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}
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static void m48t86_writeb(struct device *dev,
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unsigned char value, unsigned long addr)
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{
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struct m48t86_rtc_info *info = dev_get_drvdata(dev);
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writeb(addr, info->index_reg);
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writeb(value, info->data_reg);
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}
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static int m48t86_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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unsigned char reg;
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reg = m48t86_readb(dev, M48T86_B);
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if (reg & M48T86_B_DM) {
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/* data (binary) mode */
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tm->tm_sec = m48t86_readb(dev, M48T86_SEC);
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tm->tm_min = m48t86_readb(dev, M48T86_MIN);
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tm->tm_hour = m48t86_readb(dev, M48T86_HOUR) & 0x3f;
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tm->tm_mday = m48t86_readb(dev, M48T86_DOM);
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/* tm_mon is 0-11 */
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tm->tm_mon = m48t86_readb(dev, M48T86_MONTH) - 1;
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tm->tm_year = m48t86_readb(dev, M48T86_YEAR) + 100;
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tm->tm_wday = m48t86_readb(dev, M48T86_DOW);
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} else {
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/* bcd mode */
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tm->tm_sec = bcd2bin(m48t86_readb(dev, M48T86_SEC));
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tm->tm_min = bcd2bin(m48t86_readb(dev, M48T86_MIN));
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tm->tm_hour = bcd2bin(m48t86_readb(dev, M48T86_HOUR) &
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0x3f);
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tm->tm_mday = bcd2bin(m48t86_readb(dev, M48T86_DOM));
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/* tm_mon is 0-11 */
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tm->tm_mon = bcd2bin(m48t86_readb(dev, M48T86_MONTH)) - 1;
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tm->tm_year = bcd2bin(m48t86_readb(dev, M48T86_YEAR)) + 100;
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tm->tm_wday = bcd2bin(m48t86_readb(dev, M48T86_DOW));
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}
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/* correct the hour if the clock is in 12h mode */
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if (!(reg & M48T86_B_H24))
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if (m48t86_readb(dev, M48T86_HOUR) & 0x80)
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tm->tm_hour += 12;
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return 0;
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}
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static int m48t86_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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unsigned char reg;
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reg = m48t86_readb(dev, M48T86_B);
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/* update flag and 24h mode */
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reg |= M48T86_B_SET | M48T86_B_H24;
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m48t86_writeb(dev, reg, M48T86_B);
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if (reg & M48T86_B_DM) {
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/* data (binary) mode */
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m48t86_writeb(dev, tm->tm_sec, M48T86_SEC);
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m48t86_writeb(dev, tm->tm_min, M48T86_MIN);
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m48t86_writeb(dev, tm->tm_hour, M48T86_HOUR);
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m48t86_writeb(dev, tm->tm_mday, M48T86_DOM);
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m48t86_writeb(dev, tm->tm_mon + 1, M48T86_MONTH);
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m48t86_writeb(dev, tm->tm_year % 100, M48T86_YEAR);
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m48t86_writeb(dev, tm->tm_wday, M48T86_DOW);
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} else {
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/* bcd mode */
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m48t86_writeb(dev, bin2bcd(tm->tm_sec), M48T86_SEC);
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m48t86_writeb(dev, bin2bcd(tm->tm_min), M48T86_MIN);
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m48t86_writeb(dev, bin2bcd(tm->tm_hour), M48T86_HOUR);
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m48t86_writeb(dev, bin2bcd(tm->tm_mday), M48T86_DOM);
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m48t86_writeb(dev, bin2bcd(tm->tm_mon + 1), M48T86_MONTH);
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m48t86_writeb(dev, bin2bcd(tm->tm_year % 100), M48T86_YEAR);
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m48t86_writeb(dev, bin2bcd(tm->tm_wday), M48T86_DOW);
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}
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/* update ended */
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reg &= ~M48T86_B_SET;
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m48t86_writeb(dev, reg, M48T86_B);
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return 0;
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}
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static int m48t86_rtc_proc(struct device *dev, struct seq_file *seq)
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{
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unsigned char reg;
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reg = m48t86_readb(dev, M48T86_B);
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seq_printf(seq, "mode\t\t: %s\n",
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(reg & M48T86_B_DM) ? "binary" : "bcd");
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reg = m48t86_readb(dev, M48T86_D);
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seq_printf(seq, "battery\t\t: %s\n",
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(reg & M48T86_D_VRT) ? "ok" : "exhausted");
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return 0;
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}
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static const struct rtc_class_ops m48t86_rtc_ops = {
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.read_time = m48t86_rtc_read_time,
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.set_time = m48t86_rtc_set_time,
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.proc = m48t86_rtc_proc,
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};
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static int m48t86_nvram_read(void *priv, unsigned int off, void *buf,
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size_t count)
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{
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struct device *dev = priv;
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unsigned int i;
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for (i = 0; i < count; i++)
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((u8 *)buf)[i] = m48t86_readb(dev, M48T86_NVRAM(off + i));
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return 0;
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}
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static int m48t86_nvram_write(void *priv, unsigned int off, void *buf,
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size_t count)
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{
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struct device *dev = priv;
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unsigned int i;
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for (i = 0; i < count; i++)
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m48t86_writeb(dev, ((u8 *)buf)[i], M48T86_NVRAM(off + i));
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return 0;
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}
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/*
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* The RTC is an optional feature at purchase time on some Technologic Systems
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* boards. Verify that it actually exists by checking if the last two bytes
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* of the NVRAM can be changed.
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*
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* This is based on the method used in their rtc7800.c example.
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*/
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static bool m48t86_verify_chip(struct platform_device *pdev)
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{
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unsigned int offset0 = M48T86_NVRAM(M48T86_NVRAM_LEN - 2);
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unsigned int offset1 = M48T86_NVRAM(M48T86_NVRAM_LEN - 1);
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unsigned char tmp0, tmp1;
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tmp0 = m48t86_readb(&pdev->dev, offset0);
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tmp1 = m48t86_readb(&pdev->dev, offset1);
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m48t86_writeb(&pdev->dev, 0x00, offset0);
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m48t86_writeb(&pdev->dev, 0x55, offset1);
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if (m48t86_readb(&pdev->dev, offset1) == 0x55) {
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m48t86_writeb(&pdev->dev, 0xaa, offset1);
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if (m48t86_readb(&pdev->dev, offset1) == 0xaa &&
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m48t86_readb(&pdev->dev, offset0) == 0x00) {
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m48t86_writeb(&pdev->dev, tmp0, offset0);
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m48t86_writeb(&pdev->dev, tmp1, offset1);
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return true;
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}
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}
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return false;
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}
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static int m48t86_rtc_probe(struct platform_device *pdev)
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{
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struct m48t86_rtc_info *info;
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unsigned char reg;
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int err;
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struct nvmem_config m48t86_nvmem_cfg = {
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.name = "m48t86_nvram",
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.word_size = 1,
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.stride = 1,
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.size = M48T86_NVRAM_LEN,
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.reg_read = m48t86_nvram_read,
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.reg_write = m48t86_nvram_write,
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.priv = &pdev->dev,
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};
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info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
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if (!info)
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return -ENOMEM;
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info->index_reg = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(info->index_reg))
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return PTR_ERR(info->index_reg);
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info->data_reg = devm_platform_ioremap_resource(pdev, 1);
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if (IS_ERR(info->data_reg))
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return PTR_ERR(info->data_reg);
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dev_set_drvdata(&pdev->dev, info);
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if (!m48t86_verify_chip(pdev)) {
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dev_info(&pdev->dev, "RTC not present\n");
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return -ENODEV;
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}
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info->rtc = devm_rtc_allocate_device(&pdev->dev);
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if (IS_ERR(info->rtc))
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return PTR_ERR(info->rtc);
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info->rtc->ops = &m48t86_rtc_ops;
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err = devm_rtc_register_device(info->rtc);
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if (err)
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return err;
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devm_rtc_nvmem_register(info->rtc, &m48t86_nvmem_cfg);
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/* read battery status */
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reg = m48t86_readb(&pdev->dev, M48T86_D);
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dev_info(&pdev->dev, "battery %s\n",
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(reg & M48T86_D_VRT) ? "ok" : "exhausted");
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return 0;
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}
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static const struct of_device_id m48t86_rtc_of_ids[] = {
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{ .compatible = "st,m48t86" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, m48t86_rtc_of_ids);
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static struct platform_driver m48t86_rtc_platform_driver = {
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.driver = {
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.name = "rtc-m48t86",
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.of_match_table = m48t86_rtc_of_ids,
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},
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.probe = m48t86_rtc_probe,
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};
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module_platform_driver(m48t86_rtc_platform_driver);
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MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
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MODULE_DESCRIPTION("M48T86 RTC driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:rtc-m48t86");
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