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173d2c6326
Use the device lifecycle managed allocation function. This helps prevent mistakes like freeing out of order in cleanup functions and forgetting to free on error paths. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240123184632.725054-8-afd@ti.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
471 lines
11 KiB
C
471 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* ST's Remote Processor Control Driver
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*
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* Copyright (C) 2015 STMicroelectronics - All Rights Reserved
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*
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* Author: Ludovic Barre <ludovic.barre@st.com>
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*/
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/mailbox_client.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_reserved_mem.h>
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#include <linux/platform_device.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/remoteproc.h>
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#include <linux/reset.h>
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#include "remoteproc_internal.h"
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#define ST_RPROC_VQ0 0
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#define ST_RPROC_VQ1 1
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#define ST_RPROC_MAX_VRING 2
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#define MBOX_RX 0
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#define MBOX_TX 1
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#define MBOX_MAX 2
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struct st_rproc_config {
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bool sw_reset;
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bool pwr_reset;
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unsigned long bootaddr_mask;
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};
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struct st_rproc {
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struct st_rproc_config *config;
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struct reset_control *sw_reset;
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struct reset_control *pwr_reset;
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struct clk *clk;
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u32 clk_rate;
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struct regmap *boot_base;
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u32 boot_offset;
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struct mbox_chan *mbox_chan[ST_RPROC_MAX_VRING * MBOX_MAX];
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struct mbox_client mbox_client_vq0;
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struct mbox_client mbox_client_vq1;
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};
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static void st_rproc_mbox_callback(struct device *dev, u32 msg)
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{
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struct rproc *rproc = dev_get_drvdata(dev);
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if (rproc_vq_interrupt(rproc, msg) == IRQ_NONE)
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dev_dbg(dev, "no message was found in vqid %d\n", msg);
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}
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static
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void st_rproc_mbox_callback_vq0(struct mbox_client *mbox_client, void *data)
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{
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st_rproc_mbox_callback(mbox_client->dev, 0);
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}
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static
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void st_rproc_mbox_callback_vq1(struct mbox_client *mbox_client, void *data)
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{
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st_rproc_mbox_callback(mbox_client->dev, 1);
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}
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static void st_rproc_kick(struct rproc *rproc, int vqid)
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{
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struct st_rproc *ddata = rproc->priv;
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struct device *dev = rproc->dev.parent;
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int ret;
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/* send the index of the triggered virtqueue in the mailbox payload */
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if (WARN_ON(vqid >= ST_RPROC_MAX_VRING))
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return;
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ret = mbox_send_message(ddata->mbox_chan[vqid * MBOX_MAX + MBOX_TX],
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(void *)&vqid);
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if (ret < 0)
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dev_err(dev, "failed to send message via mbox: %d\n", ret);
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}
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static int st_rproc_mem_alloc(struct rproc *rproc,
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struct rproc_mem_entry *mem)
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{
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struct device *dev = rproc->dev.parent;
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void *va;
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va = ioremap_wc(mem->dma, mem->len);
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if (!va) {
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dev_err(dev, "Unable to map memory region: %pa+%zx\n",
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&mem->dma, mem->len);
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return -ENOMEM;
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}
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/* Update memory entry va */
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mem->va = va;
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return 0;
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}
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static int st_rproc_mem_release(struct rproc *rproc,
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struct rproc_mem_entry *mem)
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{
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iounmap(mem->va);
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return 0;
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}
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static int st_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
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{
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struct device *dev = rproc->dev.parent;
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struct device_node *np = dev->of_node;
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struct rproc_mem_entry *mem;
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struct reserved_mem *rmem;
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struct of_phandle_iterator it;
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int index = 0;
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of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
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while (of_phandle_iterator_next(&it) == 0) {
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rmem = of_reserved_mem_lookup(it.node);
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if (!rmem) {
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of_node_put(it.node);
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dev_err(dev, "unable to acquire memory-region\n");
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return -EINVAL;
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}
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/* No need to map vdev buffer */
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if (strcmp(it.node->name, "vdev0buffer")) {
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/* Register memory region */
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mem = rproc_mem_entry_init(dev, NULL,
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(dma_addr_t)rmem->base,
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rmem->size, rmem->base,
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st_rproc_mem_alloc,
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st_rproc_mem_release,
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it.node->name);
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} else {
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/* Register reserved memory for vdev buffer allocation */
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mem = rproc_of_resm_mem_entry_init(dev, index,
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rmem->size,
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rmem->base,
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it.node->name);
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}
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if (!mem) {
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of_node_put(it.node);
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return -ENOMEM;
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}
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rproc_add_carveout(rproc, mem);
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index++;
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}
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return rproc_elf_load_rsc_table(rproc, fw);
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}
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static int st_rproc_start(struct rproc *rproc)
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{
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struct st_rproc *ddata = rproc->priv;
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int err;
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regmap_update_bits(ddata->boot_base, ddata->boot_offset,
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ddata->config->bootaddr_mask, rproc->bootaddr);
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err = clk_enable(ddata->clk);
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if (err) {
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dev_err(&rproc->dev, "Failed to enable clock\n");
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return err;
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}
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if (ddata->config->sw_reset) {
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err = reset_control_deassert(ddata->sw_reset);
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if (err) {
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dev_err(&rproc->dev, "Failed to deassert S/W Reset\n");
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goto sw_reset_fail;
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}
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}
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if (ddata->config->pwr_reset) {
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err = reset_control_deassert(ddata->pwr_reset);
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if (err) {
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dev_err(&rproc->dev, "Failed to deassert Power Reset\n");
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goto pwr_reset_fail;
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}
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}
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dev_info(&rproc->dev, "Started from 0x%llx\n", rproc->bootaddr);
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return 0;
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pwr_reset_fail:
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if (ddata->config->pwr_reset)
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reset_control_assert(ddata->sw_reset);
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sw_reset_fail:
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clk_disable(ddata->clk);
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return err;
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}
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static int st_rproc_stop(struct rproc *rproc)
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{
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struct st_rproc *ddata = rproc->priv;
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int sw_err = 0, pwr_err = 0;
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if (ddata->config->sw_reset) {
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sw_err = reset_control_assert(ddata->sw_reset);
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if (sw_err)
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dev_err(&rproc->dev, "Failed to assert S/W Reset\n");
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}
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if (ddata->config->pwr_reset) {
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pwr_err = reset_control_assert(ddata->pwr_reset);
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if (pwr_err)
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dev_err(&rproc->dev, "Failed to assert Power Reset\n");
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}
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clk_disable(ddata->clk);
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return sw_err ?: pwr_err;
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}
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static const struct rproc_ops st_rproc_ops = {
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.kick = st_rproc_kick,
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.start = st_rproc_start,
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.stop = st_rproc_stop,
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.parse_fw = st_rproc_parse_fw,
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.load = rproc_elf_load_segments,
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.find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
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.sanity_check = rproc_elf_sanity_check,
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.get_boot_addr = rproc_elf_get_boot_addr,
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};
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/*
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* Fetch state of the processor: 0 is off, 1 is on.
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*/
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static int st_rproc_state(struct platform_device *pdev)
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{
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struct rproc *rproc = platform_get_drvdata(pdev);
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struct st_rproc *ddata = rproc->priv;
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int reset_sw = 0, reset_pwr = 0;
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if (ddata->config->sw_reset)
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reset_sw = reset_control_status(ddata->sw_reset);
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if (ddata->config->pwr_reset)
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reset_pwr = reset_control_status(ddata->pwr_reset);
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if (reset_sw < 0 || reset_pwr < 0)
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return -EINVAL;
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return !reset_sw && !reset_pwr;
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}
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static const struct st_rproc_config st40_rproc_cfg = {
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.sw_reset = true,
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.pwr_reset = true,
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.bootaddr_mask = GENMASK(28, 1),
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};
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static const struct st_rproc_config st231_rproc_cfg = {
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.sw_reset = true,
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.pwr_reset = false,
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.bootaddr_mask = GENMASK(31, 6),
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};
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static const struct of_device_id st_rproc_match[] = {
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{ .compatible = "st,st40-rproc", .data = &st40_rproc_cfg },
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{ .compatible = "st,st231-rproc", .data = &st231_rproc_cfg },
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{},
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};
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MODULE_DEVICE_TABLE(of, st_rproc_match);
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static int st_rproc_parse_dt(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct rproc *rproc = platform_get_drvdata(pdev);
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struct st_rproc *ddata = rproc->priv;
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struct device_node *np = dev->of_node;
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int err;
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if (ddata->config->sw_reset) {
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ddata->sw_reset = devm_reset_control_get_exclusive(dev,
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"sw_reset");
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if (IS_ERR(ddata->sw_reset)) {
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dev_err(dev, "Failed to get S/W Reset\n");
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return PTR_ERR(ddata->sw_reset);
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}
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}
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if (ddata->config->pwr_reset) {
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ddata->pwr_reset = devm_reset_control_get_exclusive(dev,
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"pwr_reset");
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if (IS_ERR(ddata->pwr_reset)) {
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dev_err(dev, "Failed to get Power Reset\n");
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return PTR_ERR(ddata->pwr_reset);
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}
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}
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ddata->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(ddata->clk)) {
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dev_err(dev, "Failed to get clock\n");
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return PTR_ERR(ddata->clk);
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}
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err = of_property_read_u32(np, "clock-frequency", &ddata->clk_rate);
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if (err) {
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dev_err(dev, "failed to get clock frequency\n");
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return err;
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}
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ddata->boot_base = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
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if (IS_ERR(ddata->boot_base)) {
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dev_err(dev, "Boot base not found\n");
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return PTR_ERR(ddata->boot_base);
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}
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err = of_property_read_u32_index(np, "st,syscfg", 1,
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&ddata->boot_offset);
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if (err) {
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dev_err(dev, "Boot offset not found\n");
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return -EINVAL;
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}
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err = clk_prepare(ddata->clk);
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if (err)
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dev_err(dev, "failed to get clock\n");
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return err;
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}
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static int st_rproc_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct st_rproc *ddata;
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struct device_node *np = dev->of_node;
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struct rproc *rproc;
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struct mbox_chan *chan;
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int enabled;
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int ret, i;
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rproc = devm_rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
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if (!rproc)
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return -ENOMEM;
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rproc->has_iommu = false;
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ddata = rproc->priv;
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ddata->config = (struct st_rproc_config *)device_get_match_data(dev);
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if (!ddata->config)
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return -ENODEV;
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platform_set_drvdata(pdev, rproc);
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ret = st_rproc_parse_dt(pdev);
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if (ret)
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return ret;
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enabled = st_rproc_state(pdev);
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if (enabled < 0) {
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ret = enabled;
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goto free_clk;
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}
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if (enabled) {
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atomic_inc(&rproc->power);
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rproc->state = RPROC_RUNNING;
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} else {
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clk_set_rate(ddata->clk, ddata->clk_rate);
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}
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if (of_property_present(np, "mbox-names")) {
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ddata->mbox_client_vq0.dev = dev;
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ddata->mbox_client_vq0.tx_done = NULL;
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ddata->mbox_client_vq0.tx_block = false;
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ddata->mbox_client_vq0.knows_txdone = false;
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ddata->mbox_client_vq0.rx_callback = st_rproc_mbox_callback_vq0;
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ddata->mbox_client_vq1.dev = dev;
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ddata->mbox_client_vq1.tx_done = NULL;
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ddata->mbox_client_vq1.tx_block = false;
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ddata->mbox_client_vq1.knows_txdone = false;
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ddata->mbox_client_vq1.rx_callback = st_rproc_mbox_callback_vq1;
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/*
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* To control a co-processor without IPC mechanism.
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* This driver can be used without mbox and rpmsg.
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*/
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chan = mbox_request_channel_byname(&ddata->mbox_client_vq0, "vq0_rx");
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if (IS_ERR(chan)) {
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dev_err(&rproc->dev, "failed to request mbox chan 0\n");
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ret = PTR_ERR(chan);
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goto free_clk;
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}
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ddata->mbox_chan[ST_RPROC_VQ0 * MBOX_MAX + MBOX_RX] = chan;
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chan = mbox_request_channel_byname(&ddata->mbox_client_vq0, "vq0_tx");
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if (IS_ERR(chan)) {
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dev_err(&rproc->dev, "failed to request mbox chan 0\n");
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ret = PTR_ERR(chan);
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goto free_mbox;
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}
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ddata->mbox_chan[ST_RPROC_VQ0 * MBOX_MAX + MBOX_TX] = chan;
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chan = mbox_request_channel_byname(&ddata->mbox_client_vq1, "vq1_rx");
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if (IS_ERR(chan)) {
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dev_err(&rproc->dev, "failed to request mbox chan 1\n");
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ret = PTR_ERR(chan);
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goto free_mbox;
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}
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ddata->mbox_chan[ST_RPROC_VQ1 * MBOX_MAX + MBOX_RX] = chan;
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chan = mbox_request_channel_byname(&ddata->mbox_client_vq1, "vq1_tx");
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if (IS_ERR(chan)) {
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dev_err(&rproc->dev, "failed to request mbox chan 1\n");
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ret = PTR_ERR(chan);
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goto free_mbox;
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}
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ddata->mbox_chan[ST_RPROC_VQ1 * MBOX_MAX + MBOX_TX] = chan;
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}
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ret = rproc_add(rproc);
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if (ret)
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goto free_mbox;
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return 0;
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free_mbox:
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for (i = 0; i < ST_RPROC_MAX_VRING * MBOX_MAX; i++)
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mbox_free_channel(ddata->mbox_chan[i]);
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free_clk:
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clk_unprepare(ddata->clk);
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return ret;
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}
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static void st_rproc_remove(struct platform_device *pdev)
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{
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struct rproc *rproc = platform_get_drvdata(pdev);
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struct st_rproc *ddata = rproc->priv;
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int i;
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rproc_del(rproc);
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clk_disable_unprepare(ddata->clk);
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for (i = 0; i < ST_RPROC_MAX_VRING * MBOX_MAX; i++)
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mbox_free_channel(ddata->mbox_chan[i]);
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}
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static struct platform_driver st_rproc_driver = {
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.probe = st_rproc_probe,
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.remove_new = st_rproc_remove,
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.driver = {
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.name = "st-rproc",
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.of_match_table = of_match_ptr(st_rproc_match),
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},
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};
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module_platform_driver(st_rproc_driver);
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MODULE_DESCRIPTION("ST Remote Processor Control Driver");
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MODULE_AUTHOR("Ludovic Barre <ludovic.barre@st.com>");
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MODULE_LICENSE("GPL v2");
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