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make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pwm/pwm-imx1.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pwm/pwm-imx27.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pwm/pwm-intel-lgm.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pwm/pwm-mediatek.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pwm/pwm-pxa.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pwm/pwm-samsung.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pwm/pwm-spear.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pwm/pwm-visconti.o Add the missing invocations of the MODULE_DESCRIPTION() macro. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Link: https://lore.kernel.org/r/20240610-md-drivers-pwm-v2-1-b337cfaa70ea@quicinc.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
213 lines
5.0 KiB
C
213 lines
5.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* drivers/pwm/pwm-pxa.c
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*
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* simple driver for PWM (Pulse Width Modulator) controller
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*
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* 2008-02-13 initial version
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* eric miao <eric.miao@marvell.com>
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*
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* Links to reference manuals for some of the supported PWM chips can be found
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* in Documentation/arch/arm/marvell.rst.
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*
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* Limitations:
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* - When PWM is stopped, the current PWM period stops abruptly at the next
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* input clock (PWMCR_SD is set) and the output is driven to inactive.
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*/
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/pwm.h>
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#include <linux/of.h>
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#include <asm/div64.h>
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#define HAS_SECONDARY_PWM 0x10
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static const struct platform_device_id pwm_id_table[] = {
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/* PWM has_secondary_pwm? */
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{ "pxa25x-pwm", 0 },
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{ "pxa27x-pwm", HAS_SECONDARY_PWM },
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{ "pxa168-pwm", 0 },
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{ "pxa910-pwm", 0 },
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{ },
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};
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MODULE_DEVICE_TABLE(platform, pwm_id_table);
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/* PWM registers and bits definitions */
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#define PWMCR (0x00)
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#define PWMDCR (0x04)
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#define PWMPCR (0x08)
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#define PWMCR_SD (1 << 6)
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#define PWMDCR_FD (1 << 10)
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struct pxa_pwm_chip {
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struct device *dev;
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struct clk *clk;
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void __iomem *mmio_base;
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};
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static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
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{
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return pwmchip_get_drvdata(chip);
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}
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/*
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* period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
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* duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
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*/
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static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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u64 duty_ns, u64 period_ns)
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{
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struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
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unsigned long long c;
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unsigned long period_cycles, prescale, pv, dc;
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unsigned long offset;
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offset = pwm->hwpwm ? 0x10 : 0;
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c = clk_get_rate(pc->clk);
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c = c * period_ns;
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do_div(c, 1000000000);
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period_cycles = c;
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if (period_cycles < 1)
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period_cycles = 1;
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prescale = (period_cycles - 1) / 1024;
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pv = period_cycles / (prescale + 1) - 1;
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if (prescale > 63)
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return -EINVAL;
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if (duty_ns == period_ns)
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dc = PWMDCR_FD;
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else
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dc = mul_u64_u64_div_u64(pv + 1, duty_ns, period_ns);
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writel(prescale | PWMCR_SD, pc->mmio_base + offset + PWMCR);
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writel(dc, pc->mmio_base + offset + PWMDCR);
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writel(pv, pc->mmio_base + offset + PWMPCR);
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return 0;
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}
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static int pxa_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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const struct pwm_state *state)
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{
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struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
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u64 duty_cycle;
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int err;
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if (state->polarity != PWM_POLARITY_NORMAL)
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return -EINVAL;
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err = clk_prepare_enable(pc->clk);
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if (err)
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return err;
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duty_cycle = state->enabled ? state->duty_cycle : 0;
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err = pxa_pwm_config(chip, pwm, duty_cycle, state->period);
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if (err) {
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clk_disable_unprepare(pc->clk);
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return err;
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}
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if (state->enabled && !pwm->state.enabled)
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return 0;
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clk_disable_unprepare(pc->clk);
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if (!state->enabled && pwm->state.enabled)
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clk_disable_unprepare(pc->clk);
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return 0;
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}
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static const struct pwm_ops pxa_pwm_ops = {
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.apply = pxa_pwm_apply,
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};
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#ifdef CONFIG_OF
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/*
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* Device tree users must create one device instance for each PWM channel.
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* Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver
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* code that this is a single channel pxa25x-pwm. Currently all devices are
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* supported identically.
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*/
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static const struct of_device_id pwm_of_match[] = {
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{ .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
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{ .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
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{ .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
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{ .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
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{ }
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};
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MODULE_DEVICE_TABLE(of, pwm_of_match);
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#else
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#define pwm_of_match NULL
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#endif
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static int pwm_probe(struct platform_device *pdev)
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{
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const struct platform_device_id *id = platform_get_device_id(pdev);
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struct pwm_chip *chip;
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struct pxa_pwm_chip *pc;
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int ret = 0;
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if (IS_ENABLED(CONFIG_OF) && id == NULL)
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id = of_device_get_match_data(&pdev->dev);
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if (id == NULL)
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return -EINVAL;
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chip = devm_pwmchip_alloc(&pdev->dev,
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(id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1,
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sizeof(*pc));
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if (IS_ERR(chip))
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return PTR_ERR(chip);
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pc = to_pxa_pwm_chip(chip);
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pc->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(pc->clk))
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return PTR_ERR(pc->clk);
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chip->ops = &pxa_pwm_ops;
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if (IS_ENABLED(CONFIG_OF))
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chip->of_xlate = of_pwm_single_xlate;
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pc->mmio_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(pc->mmio_base))
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return PTR_ERR(pc->mmio_base);
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ret = devm_pwmchip_add(&pdev->dev, chip);
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if (ret < 0) {
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dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static struct platform_driver pwm_driver = {
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.driver = {
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.name = "pxa25x-pwm",
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.of_match_table = pwm_of_match,
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},
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.probe = pwm_probe,
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.id_table = pwm_id_table,
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};
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module_platform_driver(pwm_driver);
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MODULE_DESCRIPTION("PXA Pulse Width Modulator driver");
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MODULE_LICENSE("GPL v2");
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