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a513552642
Add MODULE_DEVICE_TABLE(), so modules could be properly autoloaded based
on the alias from of_device_id table.
Fixes: 7687a5b0ee ("gpio: modepin: Add driver support for modepin GPIO controller")
Signed-off-by: Liao Chen <liaochen4@huawei.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20240902115848.904227-1-liaochen4@huawei.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
164 lines
4.1 KiB
C
164 lines
4.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Driver for the ps-mode pin configuration.
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*
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* Copyright (c) 2021 Xilinx, Inc.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/gpio/driver.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/firmware/xlnx-zynqmp.h>
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/* 4-bit boot mode pins */
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#define MODE_PINS 4
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/**
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* modepin_gpio_get_value - Get the state of the specified pin of GPIO device
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* @chip: gpio_chip instance to be worked on
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* @pin: gpio pin number within the device
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*
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* This function reads the state of the specified pin of the GPIO device.
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*
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* Return: 0 if the pin is low, 1 if pin is high, -EINVAL wrong pin configured
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* or error value.
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*/
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static int modepin_gpio_get_value(struct gpio_chip *chip, unsigned int pin)
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{
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u32 regval = 0;
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int ret;
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ret = zynqmp_pm_bootmode_read(®val);
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if (ret)
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return ret;
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/* When [0:3] corresponding bit is set, then read output bit [8:11],
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* if the bit is clear then read input bit [4:7] for status or value.
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*/
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if (regval & BIT(pin))
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return !!(regval & BIT(pin + 8));
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else
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return !!(regval & BIT(pin + 4));
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}
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/**
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* modepin_gpio_set_value - Modify the state of the pin with specified value
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* @chip: gpio_chip instance to be worked on
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* @pin: gpio pin number within the device
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* @state: value used to modify the state of the specified pin
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*
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* This function reads the state of the specified pin of the GPIO device, mask
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* with the capture state of GPIO pin, and update pin of GPIO device.
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*
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* Return: None.
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*/
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static void modepin_gpio_set_value(struct gpio_chip *chip, unsigned int pin,
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int state)
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{
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u32 bootpin_val = 0;
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int ret;
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zynqmp_pm_bootmode_read(&bootpin_val);
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/* Configure pin as an output by set bit [0:3] */
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bootpin_val |= BIT(pin);
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if (state)
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bootpin_val |= BIT(pin + 8);
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else
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bootpin_val &= ~BIT(pin + 8);
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/* Configure bootpin value */
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ret = zynqmp_pm_bootmode_write(bootpin_val);
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if (ret)
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pr_err("modepin: set value error %d for pin %d\n", ret, pin);
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}
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/**
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* modepin_gpio_dir_in - Set the direction of the specified GPIO pin as input
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* @chip: gpio_chip instance to be worked on
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* @pin: gpio pin number within the device
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*
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* Return: 0 always
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*/
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static int modepin_gpio_dir_in(struct gpio_chip *chip, unsigned int pin)
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{
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return 0;
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}
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/**
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* modepin_gpio_dir_out - Set the direction of the specified GPIO pin as output
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* @chip: gpio_chip instance to be worked on
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* @pin: gpio pin number within the device
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* @state: value to be written to specified pin
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*
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* Return: 0 always
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*/
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static int modepin_gpio_dir_out(struct gpio_chip *chip, unsigned int pin,
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int state)
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{
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return 0;
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}
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/**
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* modepin_gpio_probe - Initialization method for modepin_gpio
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* @pdev: platform device instance
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*
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* Return: 0 on success, negative error otherwise.
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*/
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static int modepin_gpio_probe(struct platform_device *pdev)
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{
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struct gpio_chip *chip;
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int status;
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chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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platform_set_drvdata(pdev, chip);
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/* configure the gpio chip */
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chip->base = -1;
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chip->ngpio = MODE_PINS;
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chip->owner = THIS_MODULE;
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chip->parent = &pdev->dev;
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chip->get = modepin_gpio_get_value;
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chip->set = modepin_gpio_set_value;
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chip->direction_input = modepin_gpio_dir_in;
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chip->direction_output = modepin_gpio_dir_out;
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chip->label = dev_name(&pdev->dev);
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/* modepin gpio registration */
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status = devm_gpiochip_add_data(&pdev->dev, chip, chip);
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if (status)
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return dev_err_probe(&pdev->dev, status,
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"Failed to add GPIO chip\n");
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return status;
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}
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static const struct of_device_id modepin_platform_id[] = {
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{ .compatible = "xlnx,zynqmp-gpio-modepin", },
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{ }
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};
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MODULE_DEVICE_TABLE(of, modepin_platform_id);
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static struct platform_driver modepin_platform_driver = {
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.driver = {
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.name = "modepin-gpio",
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.of_match_table = modepin_platform_id,
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},
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.probe = modepin_gpio_probe,
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};
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module_platform_driver(modepin_platform_driver);
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MODULE_AUTHOR("Piyush Mehta <piyush.mehta@xilinx.com>");
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MODULE_DESCRIPTION("ZynqMP Boot PS_MODE Configuration");
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MODULE_LICENSE("GPL v2");
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