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25df73d933
Make it explicit that ATA host templates are not modified. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> (for DWC AHCI SATA) Reviewed-by: John Garry <john.g.garry@oracle.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> (for Tegra) Cc: Christoph Hellwig <hch@lst.de> Cc: Ming Lei <ming.lei@redhat.com> Cc: Hannes Reinecke <hare@suse.de> Cc: John Garry <john.g.garry@oracle.com> Cc: Mike Christie <michael.christie@oracle.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Link: https://lore.kernel.org/r/20230322195515.1267197-5-bvanassche@acm.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
552 lines
13 KiB
C
552 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* pata_atp867x.c - ARTOP 867X 64bit 4-channel UDMA133 ATA controller driver
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*
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* (C) 2009 Google Inc. John(Jung-Ik) Lee <jilee@google.com>
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*
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* Per Atp867 data sheet rev 1.2, Acard.
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* Based in part on early ide code from
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* 2003-2004 by Eric Uhrhane, Google, Inc.
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*
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* TODO:
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* 1. RAID features [comparison, XOR, striping, mirroring, etc.]
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/gfp.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "pata_atp867x"
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#define DRV_VERSION "0.7.5"
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/*
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* IO Registers
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* Note that all runtime hot priv ports are cached in ap private_data
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*/
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enum {
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ATP867X_IO_CHANNEL_OFFSET = 0x10,
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/*
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* IO Register Bitfields
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*/
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ATP867X_IO_PIOSPD_ACTIVE_SHIFT = 4,
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ATP867X_IO_PIOSPD_RECOVER_SHIFT = 0,
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ATP867X_IO_DMAMODE_MSTR_SHIFT = 0,
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ATP867X_IO_DMAMODE_MSTR_MASK = 0x07,
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ATP867X_IO_DMAMODE_SLAVE_SHIFT = 4,
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ATP867X_IO_DMAMODE_SLAVE_MASK = 0x70,
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ATP867X_IO_DMAMODE_UDMA_6 = 0x07,
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ATP867X_IO_DMAMODE_UDMA_5 = 0x06,
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ATP867X_IO_DMAMODE_UDMA_4 = 0x05,
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ATP867X_IO_DMAMODE_UDMA_3 = 0x04,
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ATP867X_IO_DMAMODE_UDMA_2 = 0x03,
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ATP867X_IO_DMAMODE_UDMA_1 = 0x02,
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ATP867X_IO_DMAMODE_UDMA_0 = 0x01,
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ATP867X_IO_DMAMODE_DISABLE = 0x00,
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ATP867X_IO_SYS_INFO_66MHZ = 0x04,
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ATP867X_IO_SYS_INFO_SLOW_UDMA5 = 0x02,
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ATP867X_IO_SYS_MASK_RESERVED = (~0xf1),
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ATP867X_IO_PORTSPD_VAL = 0x1143,
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ATP867X_PREREAD_VAL = 0x0200,
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ATP867X_NUM_PORTS = 4,
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ATP867X_BAR_IOBASE = 0,
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ATP867X_BAR_ROMBASE = 6,
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};
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#define ATP867X_IOBASE(ap) ((ap)->host->iomap[0])
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#define ATP867X_SYS_INFO(ap) (0x3F + ATP867X_IOBASE(ap))
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#define ATP867X_IO_PORTBASE(ap, port) (0x00 + ATP867X_IOBASE(ap) + \
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(port) * ATP867X_IO_CHANNEL_OFFSET)
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#define ATP867X_IO_DMABASE(ap, port) (0x40 + \
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ATP867X_IO_PORTBASE((ap), (port)))
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#define ATP867X_IO_STATUS(ap, port) (0x07 + \
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ATP867X_IO_PORTBASE((ap), (port)))
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#define ATP867X_IO_ALTSTATUS(ap, port) (0x0E + \
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ATP867X_IO_PORTBASE((ap), (port)))
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/*
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* hot priv ports
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*/
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#define ATP867X_IO_MSTRPIOSPD(ap, port) (0x08 + \
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ATP867X_IO_DMABASE((ap), (port)))
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#define ATP867X_IO_SLAVPIOSPD(ap, port) (0x09 + \
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ATP867X_IO_DMABASE((ap), (port)))
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#define ATP867X_IO_8BPIOSPD(ap, port) (0x0A + \
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ATP867X_IO_DMABASE((ap), (port)))
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#define ATP867X_IO_DMAMODE(ap, port) (0x0B + \
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ATP867X_IO_DMABASE((ap), (port)))
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#define ATP867X_IO_PORTSPD(ap, port) (0x4A + \
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ATP867X_IO_PORTBASE((ap), (port)))
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#define ATP867X_IO_PREREAD(ap, port) (0x4C + \
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ATP867X_IO_PORTBASE((ap), (port)))
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struct atp867x_priv {
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void __iomem *dma_mode;
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void __iomem *mstr_piospd;
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void __iomem *slave_piospd;
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void __iomem *eightb_piospd;
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int pci66mhz;
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};
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static void atp867x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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struct atp867x_priv *dp = ap->private_data;
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u8 speed = adev->dma_mode;
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u8 b;
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u8 mode = speed - XFER_UDMA_0 + 1;
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/*
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* Doc 6.6.9: decrease the udma mode value by 1 for safer UDMA speed
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* on 66MHz bus
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* rev-A: UDMA_1~4 (5, 6 no change)
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* rev-B: all UDMA modes
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* UDMA_0 stays not to disable UDMA
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*/
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if (dp->pci66mhz && mode > ATP867X_IO_DMAMODE_UDMA_0 &&
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(pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B ||
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mode < ATP867X_IO_DMAMODE_UDMA_5))
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mode--;
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b = ioread8(dp->dma_mode);
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if (adev->devno & 1) {
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b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK) |
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(mode << ATP867X_IO_DMAMODE_SLAVE_SHIFT);
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} else {
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b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK) |
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(mode << ATP867X_IO_DMAMODE_MSTR_SHIFT);
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}
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iowrite8(b, dp->dma_mode);
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}
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static int atp867x_get_active_clocks_shifted(struct ata_port *ap,
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unsigned int clk)
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{
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struct atp867x_priv *dp = ap->private_data;
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unsigned char clocks = clk;
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/*
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* Doc 6.6.9: increase the clock value by 1 for safer PIO speed
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* on 66MHz bus
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*/
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if (dp->pci66mhz)
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clocks++;
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switch (clocks) {
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case 0:
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clocks = 1;
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break;
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case 1 ... 6:
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break;
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default:
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ata_port_warn(ap, "ATP867X: active %dclk is invalid. "
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"Using 12clk.\n", clk);
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fallthrough;
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case 9 ... 12:
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clocks = 7; /* 12 clk */
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break;
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case 7:
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case 8: /* default 8 clk */
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clocks = 0;
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goto active_clock_shift_done;
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}
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active_clock_shift_done:
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return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT;
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}
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static int atp867x_get_recover_clocks_shifted(struct ata_port *ap,
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unsigned int clk)
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{
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unsigned char clocks = clk;
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switch (clocks) {
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case 0:
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clocks = 1;
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break;
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case 1 ... 11:
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break;
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case 13:
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case 14:
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--clocks; /* by the spec */
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break;
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case 15:
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break;
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default:
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ata_port_warn(ap, "ATP867X: recover %dclk is invalid. "
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"Using default 12clk.\n", clk);
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fallthrough;
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case 12: /* default 12 clk */
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clocks = 0;
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break;
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}
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return clocks << ATP867X_IO_PIOSPD_RECOVER_SHIFT;
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}
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static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct ata_device *peer = ata_dev_pair(adev);
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struct atp867x_priv *dp = ap->private_data;
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u8 speed = adev->pio_mode;
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struct ata_timing t, p;
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int T, UT;
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u8 b;
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T = 1000000000 / 33333;
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UT = T / 4;
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ata_timing_compute(adev, speed, &t, T, UT);
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if (peer && peer->pio_mode) {
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ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
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ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
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}
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b = ioread8(dp->dma_mode);
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if (adev->devno & 1)
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b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK);
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else
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b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK);
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iowrite8(b, dp->dma_mode);
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b = atp867x_get_active_clocks_shifted(ap, t.active) |
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atp867x_get_recover_clocks_shifted(ap, t.recover);
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if (adev->devno & 1)
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iowrite8(b, dp->slave_piospd);
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else
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iowrite8(b, dp->mstr_piospd);
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b = atp867x_get_active_clocks_shifted(ap, t.act8b) |
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atp867x_get_recover_clocks_shifted(ap, t.rec8b);
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iowrite8(b, dp->eightb_piospd);
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}
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static int atp867x_cable_override(struct pci_dev *pdev)
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{
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if (pdev->subsystem_vendor == PCI_VENDOR_ID_ARTOP &&
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(pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867A ||
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pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867B)) {
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return 1;
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}
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return 0;
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}
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static int atp867x_cable_detect(struct ata_port *ap)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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if (atp867x_cable_override(pdev))
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return ATA_CBL_PATA40_SHORT;
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return ATA_CBL_PATA_UNK;
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}
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static const struct scsi_host_template atp867x_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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};
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static struct ata_port_operations atp867x_ops = {
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.inherits = &ata_bmdma_port_ops,
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.cable_detect = atp867x_cable_detect,
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.set_piomode = atp867x_set_piomode,
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.set_dmamode = atp867x_set_dmamode,
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};
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static void atp867x_check_res(struct pci_dev *pdev)
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{
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int i;
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unsigned long start, len;
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/* Check the PCI resources for this channel are enabled */
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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start = pci_resource_start(pdev, i);
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len = pci_resource_len(pdev, i);
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dev_dbg(&pdev->dev, "ATP867X: resource start:len=%lx:%lx\n",
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start, len);
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}
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}
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static void atp867x_check_ports(struct ata_port *ap, int port)
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{
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struct ata_ioports *ioaddr = &ap->ioaddr;
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struct atp867x_priv *dp = ap->private_data;
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ata_port_dbg(ap, "ATP867X: port[%d] addresses\n"
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" cmd_addr =0x%lx, 0x%lx\n"
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" ctl_addr =0x%lx, 0x%lx\n"
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" bmdma_addr =0x%lx, 0x%lx\n"
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" data_addr =0x%lx\n"
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" error_addr =0x%lx\n"
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" feature_addr =0x%lx\n"
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" nsect_addr =0x%lx\n"
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" lbal_addr =0x%lx\n"
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" lbam_addr =0x%lx\n"
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" lbah_addr =0x%lx\n"
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" device_addr =0x%lx\n"
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" status_addr =0x%lx\n"
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" command_addr =0x%lx\n"
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" dp->dma_mode =0x%lx\n"
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" dp->mstr_piospd =0x%lx\n"
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" dp->slave_piospd =0x%lx\n"
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" dp->eightb_piospd =0x%lx\n"
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" dp->pci66mhz =0x%lx\n",
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port,
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(unsigned long)ioaddr->cmd_addr,
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(unsigned long)ATP867X_IO_PORTBASE(ap, port),
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(unsigned long)ioaddr->ctl_addr,
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(unsigned long)ATP867X_IO_ALTSTATUS(ap, port),
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(unsigned long)ioaddr->bmdma_addr,
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(unsigned long)ATP867X_IO_DMABASE(ap, port),
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(unsigned long)ioaddr->data_addr,
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(unsigned long)ioaddr->error_addr,
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(unsigned long)ioaddr->feature_addr,
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(unsigned long)ioaddr->nsect_addr,
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(unsigned long)ioaddr->lbal_addr,
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(unsigned long)ioaddr->lbam_addr,
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(unsigned long)ioaddr->lbah_addr,
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(unsigned long)ioaddr->device_addr,
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(unsigned long)ioaddr->status_addr,
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(unsigned long)ioaddr->command_addr,
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(unsigned long)dp->dma_mode,
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(unsigned long)dp->mstr_piospd,
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(unsigned long)dp->slave_piospd,
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(unsigned long)dp->eightb_piospd,
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(unsigned long)dp->pci66mhz);
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}
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static int atp867x_set_priv(struct ata_port *ap)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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struct atp867x_priv *dp;
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int port = ap->port_no;
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dp = ap->private_data =
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devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL);
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if (dp == NULL)
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return -ENOMEM;
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dp->dma_mode = ATP867X_IO_DMAMODE(ap, port);
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dp->mstr_piospd = ATP867X_IO_MSTRPIOSPD(ap, port);
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dp->slave_piospd = ATP867X_IO_SLAVPIOSPD(ap, port);
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dp->eightb_piospd = ATP867X_IO_8BPIOSPD(ap, port);
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dp->pci66mhz =
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ioread8(ATP867X_SYS_INFO(ap)) & ATP867X_IO_SYS_INFO_66MHZ;
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return 0;
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}
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static void atp867x_fixup(struct ata_host *host)
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{
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struct pci_dev *pdev = to_pci_dev(host->dev);
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struct ata_port *ap = host->ports[0];
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int i;
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u8 v;
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/*
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* Broken BIOS might not set latency high enough
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*/
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pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &v);
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if (v < 0x80) {
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v = 0x80;
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pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v);
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dev_dbg(&pdev->dev, "ATP867X: set latency timer to %d\n", v);
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}
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/*
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* init 8bit io ports speed(0aaarrrr) to 43h and
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* init udma modes of master/slave to 0/0(11h)
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*/
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for (i = 0; i < ATP867X_NUM_PORTS; i++)
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iowrite16(ATP867X_IO_PORTSPD_VAL, ATP867X_IO_PORTSPD(ap, i));
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/*
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* init PreREAD counts
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*/
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for (i = 0; i < ATP867X_NUM_PORTS; i++)
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iowrite16(ATP867X_PREREAD_VAL, ATP867X_IO_PREREAD(ap, i));
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v = ioread8(ATP867X_IOBASE(ap) + 0x28);
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v &= 0xcf; /* Enable INTA#: bit4=0 means enable */
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v |= 0xc0; /* Enable PCI burst, MRM & not immediate interrupts */
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iowrite8(v, ATP867X_IOBASE(ap) + 0x28);
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/*
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* Turn off the over clocked udma5 mode, only for Rev-B
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*/
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v = ioread8(ATP867X_SYS_INFO(ap));
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v &= ATP867X_IO_SYS_MASK_RESERVED;
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if (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B)
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v |= ATP867X_IO_SYS_INFO_SLOW_UDMA5;
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iowrite8(v, ATP867X_SYS_INFO(ap));
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}
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static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
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{
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struct device *gdev = host->dev;
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struct pci_dev *pdev = to_pci_dev(gdev);
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unsigned int mask = 0;
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int i, rc;
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/*
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* do not map rombase
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*/
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rc = pcim_iomap_regions(pdev, 1 << ATP867X_BAR_IOBASE, DRV_NAME);
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if (rc == -EBUSY)
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pcim_pin_device(pdev);
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if (rc)
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return rc;
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host->iomap = pcim_iomap_table(pdev);
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atp867x_check_res(pdev);
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for (i = 0; i < PCI_STD_NUM_BARS; i++)
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dev_dbg(gdev, "ATP867X: iomap[%d]=0x%p\n", i,
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host->iomap[i]);
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/*
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* request, iomap BARs and init port addresses accordingly
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*/
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for (i = 0; i < host->n_ports; i++) {
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struct ata_port *ap = host->ports[i];
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struct ata_ioports *ioaddr = &ap->ioaddr;
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ioaddr->cmd_addr = ATP867X_IO_PORTBASE(ap, i);
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ioaddr->ctl_addr = ioaddr->altstatus_addr
|
|
= ATP867X_IO_ALTSTATUS(ap, i);
|
|
ioaddr->bmdma_addr = ATP867X_IO_DMABASE(ap, i);
|
|
|
|
ata_sff_std_ports(ioaddr);
|
|
rc = atp867x_set_priv(ap);
|
|
if (rc)
|
|
return rc;
|
|
|
|
atp867x_check_ports(ap, i);
|
|
|
|
ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
|
|
(unsigned long)ioaddr->cmd_addr,
|
|
(unsigned long)ioaddr->ctl_addr);
|
|
ata_port_desc(ap, "bmdma 0x%lx",
|
|
(unsigned long)ioaddr->bmdma_addr);
|
|
|
|
mask |= 1 << i;
|
|
}
|
|
|
|
if (!mask) {
|
|
dev_err(gdev, "no available native port\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
atp867x_fixup(host);
|
|
|
|
return dma_set_mask_and_coherent(&pdev->dev, ATA_DMA_MASK);
|
|
}
|
|
|
|
static int atp867x_init_one(struct pci_dev *pdev,
|
|
const struct pci_device_id *id)
|
|
{
|
|
static const struct ata_port_info info_867x = {
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
|
.pio_mask = ATA_PIO4,
|
|
.udma_mask = ATA_UDMA6,
|
|
.port_ops = &atp867x_ops,
|
|
};
|
|
|
|
struct ata_host *host;
|
|
const struct ata_port_info *ppi[] = { &info_867x, NULL };
|
|
int rc;
|
|
|
|
ata_print_version_once(&pdev->dev, DRV_VERSION);
|
|
|
|
rc = pcim_enable_device(pdev);
|
|
if (rc)
|
|
return rc;
|
|
|
|
dev_info(&pdev->dev, "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)",
|
|
pdev->device);
|
|
|
|
host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS);
|
|
if (!host) {
|
|
dev_err(&pdev->dev, "failed to allocate ATA host\n");
|
|
rc = -ENOMEM;
|
|
goto err_out;
|
|
}
|
|
|
|
rc = atp867x_ata_pci_sff_init_host(host);
|
|
if (rc) {
|
|
dev_err(&pdev->dev, "failed to init host\n");
|
|
goto err_out;
|
|
}
|
|
|
|
pci_set_master(pdev);
|
|
|
|
rc = ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
|
|
IRQF_SHARED, &atp867x_sht);
|
|
if (rc)
|
|
dev_err(&pdev->dev, "failed to activate host\n");
|
|
|
|
err_out:
|
|
return rc;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int atp867x_reinit_one(struct pci_dev *pdev)
|
|
{
|
|
struct ata_host *host = pci_get_drvdata(pdev);
|
|
int rc;
|
|
|
|
rc = ata_pci_device_do_resume(pdev);
|
|
if (rc)
|
|
return rc;
|
|
|
|
atp867x_fixup(host);
|
|
|
|
ata_host_resume(host);
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static struct pci_device_id atp867x_pci_tbl[] = {
|
|
{ PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867A), 0 },
|
|
{ PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867B), 0 },
|
|
{ },
|
|
};
|
|
|
|
static struct pci_driver atp867x_driver = {
|
|
.name = DRV_NAME,
|
|
.id_table = atp867x_pci_tbl,
|
|
.probe = atp867x_init_one,
|
|
.remove = ata_pci_remove_one,
|
|
#ifdef CONFIG_PM_SLEEP
|
|
.suspend = ata_pci_device_suspend,
|
|
.resume = atp867x_reinit_one,
|
|
#endif
|
|
};
|
|
|
|
module_pci_driver(atp867x_driver);
|
|
|
|
MODULE_AUTHOR("John(Jung-Ik) Lee, Google Inc.");
|
|
MODULE_DESCRIPTION("low level driver for Artop/Acard 867x ATA controller");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DEVICE_TABLE(pci, atp867x_pci_tbl);
|
|
MODULE_VERSION(DRV_VERSION);
|