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b9af641827
commit9636be85cc
("x86/hyperv: Fix hyperv_pcpu_input_arg handling when CPUs go online/offline") introduces a new cpuhp state for hyperv initialization. cpuhp_setup_state() returns the state number if state is CPUHP_AP_ONLINE_DYN or CPUHP_BP_PREPARE_DYN and 0 for all other states. For the hyperv case, since a new cpuhp state was introduced it would return 0. However, in hv_machine_shutdown(), the cpuhp_remove_state() call is conditioned upon "hyperv_init_cpuhp > 0". This will never be true and so hv_cpu_die() won't be called on all CPUs. This means the VP assist page won't be reset. When the kexec kernel tries to setup the VP assist page again, the hypervisor corrupts the memory region of the old VP assist page causing a panic in case the kexec kernel is using that memory elsewhere. This was originally fixed in commitdfe94d4086
("x86/hyperv: Fix kexec panic/hang issues"). Get rid of hyperv_init_cpuhp entirely since we are no longer using a dynamic cpuhp state and use CPUHP_AP_HYPERV_ONLINE directly with cpuhp_remove_state(). Cc: stable@vger.kernel.org Fixes:9636be85cc
("x86/hyperv: Fix hyperv_pcpu_input_arg handling when CPUs go online/offline") Signed-off-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com> Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Link: https://lore.kernel.org/r/20240828112158.3538342-1-anirudh@anirudhrb.com Signed-off-by: Wei Liu <wei.liu@kernel.org> Message-ID: <20240828112158.3538342-1-anirudh@anirudhrb.com>
351 lines
10 KiB
C
351 lines
10 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_MSHYPER_H
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#define _ASM_X86_MSHYPER_H
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#include <linux/types.h>
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#include <linux/nmi.h>
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#include <linux/msi.h>
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#include <linux/io.h>
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#include <asm/hyperv-tlfs.h>
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#include <asm/nospec-branch.h>
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#include <asm/paravirt.h>
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#include <asm/mshyperv.h>
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/*
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* Hyper-V always provides a single IO-APIC at this MMIO address.
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* Ideally, the value should be looked up in ACPI tables, but it
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* is needed for mapping the IO-APIC early in boot on Confidential
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* VMs, before ACPI functions can be used.
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*/
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#define HV_IOAPIC_BASE_ADDRESS 0xfec00000
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#define HV_VTL_NORMAL 0x0
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#define HV_VTL_SECURE 0x1
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#define HV_VTL_MGMT 0x2
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union hv_ghcb;
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DECLARE_STATIC_KEY_FALSE(isolation_type_snp);
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DECLARE_STATIC_KEY_FALSE(isolation_type_tdx);
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typedef int (*hyperv_fill_flush_list_func)(
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struct hv_guest_mapping_flush_list *flush,
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void *data);
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void hyperv_vector_handler(struct pt_regs *regs);
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static inline unsigned char hv_get_nmi_reason(void)
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{
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return 0;
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}
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#if IS_ENABLED(CONFIG_HYPERV)
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extern bool hyperv_paravisor_present;
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extern void *hv_hypercall_pg;
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extern u64 hv_current_partition_id;
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extern union hv_ghcb * __percpu *hv_ghcb_pg;
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bool hv_isolation_type_snp(void);
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bool hv_isolation_type_tdx(void);
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u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
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/*
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* DEFAULT INIT GPAT and SEGMENT LIMIT value in struct VMSA
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* to start AP in enlightened SEV guest.
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*/
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#define HV_AP_INIT_GPAT_DEFAULT 0x0007040600070406ULL
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#define HV_AP_SEGMENT_LIMIT 0xffffffff
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int hv_call_deposit_pages(int node, u64 partition_id, u32 num_pages);
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int hv_call_add_logical_proc(int node, u32 lp_index, u32 acpi_id);
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int hv_call_create_vp(int node, u64 partition_id, u32 vp_index, u32 flags);
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/*
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* If the hypercall involves no input or output parameters, the hypervisor
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* ignores the corresponding GPA pointer.
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*/
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static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
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{
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u64 input_address = input ? virt_to_phys(input) : 0;
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u64 output_address = output ? virt_to_phys(output) : 0;
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u64 hv_status;
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#ifdef CONFIG_X86_64
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if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
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return hv_tdx_hypercall(control, input_address, output_address);
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if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
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__asm__ __volatile__("mov %4, %%r8\n"
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"vmmcall"
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input_address)
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: "r" (output_address)
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: "cc", "memory", "r8", "r9", "r10", "r11");
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return hv_status;
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}
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if (!hv_hypercall_pg)
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return U64_MAX;
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__asm__ __volatile__("mov %4, %%r8\n"
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CALL_NOSPEC
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input_address)
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: "r" (output_address),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "memory", "r8", "r9", "r10", "r11");
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#else
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u32 input_address_hi = upper_32_bits(input_address);
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u32 input_address_lo = lower_32_bits(input_address);
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u32 output_address_hi = upper_32_bits(output_address);
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u32 output_address_lo = lower_32_bits(output_address);
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if (!hv_hypercall_pg)
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return U64_MAX;
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__asm__ __volatile__(CALL_NOSPEC
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: "=A" (hv_status),
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"+c" (input_address_lo), ASM_CALL_CONSTRAINT
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: "A" (control),
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"b" (input_address_hi),
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"D"(output_address_hi), "S"(output_address_lo),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "memory");
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#endif /* !x86_64 */
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return hv_status;
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}
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/* Hypercall to the L0 hypervisor */
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static inline u64 hv_do_nested_hypercall(u64 control, void *input, void *output)
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{
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return hv_do_hypercall(control | HV_HYPERCALL_NESTED, input, output);
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}
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/* Fast hypercall with 8 bytes of input and no output */
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static inline u64 _hv_do_fast_hypercall8(u64 control, u64 input1)
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{
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u64 hv_status;
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#ifdef CONFIG_X86_64
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if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
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return hv_tdx_hypercall(control, input1, 0);
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if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
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__asm__ __volatile__(
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"vmmcall"
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input1)
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:: "cc", "r8", "r9", "r10", "r11");
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} else {
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__asm__ __volatile__(CALL_NOSPEC
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input1)
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: THUNK_TARGET(hv_hypercall_pg)
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: "cc", "r8", "r9", "r10", "r11");
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}
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#else
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{
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u32 input1_hi = upper_32_bits(input1);
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u32 input1_lo = lower_32_bits(input1);
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__asm__ __volatile__ (CALL_NOSPEC
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: "=A"(hv_status),
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"+c"(input1_lo),
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ASM_CALL_CONSTRAINT
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: "A" (control),
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"b" (input1_hi),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "edi", "esi");
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}
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#endif
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return hv_status;
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}
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static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
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{
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u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
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return _hv_do_fast_hypercall8(control, input1);
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}
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static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1)
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{
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u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
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return _hv_do_fast_hypercall8(control, input1);
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}
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/* Fast hypercall with 16 bytes of input */
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static inline u64 _hv_do_fast_hypercall16(u64 control, u64 input1, u64 input2)
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{
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u64 hv_status;
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#ifdef CONFIG_X86_64
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if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
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return hv_tdx_hypercall(control, input1, input2);
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if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
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__asm__ __volatile__("mov %4, %%r8\n"
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"vmmcall"
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input1)
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: "r" (input2)
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: "cc", "r8", "r9", "r10", "r11");
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} else {
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__asm__ __volatile__("mov %4, %%r8\n"
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CALL_NOSPEC
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input1)
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: "r" (input2),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "r8", "r9", "r10", "r11");
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}
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#else
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{
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u32 input1_hi = upper_32_bits(input1);
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u32 input1_lo = lower_32_bits(input1);
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u32 input2_hi = upper_32_bits(input2);
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u32 input2_lo = lower_32_bits(input2);
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__asm__ __volatile__ (CALL_NOSPEC
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: "=A"(hv_status),
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"+c"(input1_lo), ASM_CALL_CONSTRAINT
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: "A" (control), "b" (input1_hi),
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"D"(input2_hi), "S"(input2_lo),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc");
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}
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#endif
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return hv_status;
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}
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static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
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{
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u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
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return _hv_do_fast_hypercall16(control, input1, input2);
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}
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static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u64 input2)
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{
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u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
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return _hv_do_fast_hypercall16(control, input1, input2);
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}
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extern struct hv_vp_assist_page **hv_vp_assist_page;
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static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
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{
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if (!hv_vp_assist_page)
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return NULL;
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return hv_vp_assist_page[cpu];
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}
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void __init hyperv_init(void);
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void hyperv_setup_mmu_ops(void);
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void set_hv_tscchange_cb(void (*cb)(void));
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void clear_hv_tscchange_cb(void);
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void hyperv_stop_tsc_emulation(void);
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int hyperv_flush_guest_mapping(u64 as);
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int hyperv_flush_guest_mapping_range(u64 as,
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hyperv_fill_flush_list_func fill_func, void *data);
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int hyperv_fill_flush_guest_mapping_list(
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struct hv_guest_mapping_flush_list *flush,
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u64 start_gfn, u64 end_gfn);
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#ifdef CONFIG_X86_64
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void hv_apic_init(void);
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void __init hv_init_spinlocks(void);
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bool hv_vcpu_is_preempted(int vcpu);
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#else
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static inline void hv_apic_init(void) {}
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#endif
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struct irq_domain *hv_create_pci_msi_domain(void);
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int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector,
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struct hv_interrupt_entry *entry);
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int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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bool hv_ghcb_negotiate_protocol(void);
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void __noreturn hv_ghcb_terminate(unsigned int set, unsigned int reason);
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int hv_snp_boot_ap(u32 cpu, unsigned long start_ip);
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#else
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static inline bool hv_ghcb_negotiate_protocol(void) { return false; }
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static inline void hv_ghcb_terminate(unsigned int set, unsigned int reason) {}
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static inline int hv_snp_boot_ap(u32 cpu, unsigned long start_ip) { return 0; }
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#endif
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#if defined(CONFIG_AMD_MEM_ENCRYPT) || defined(CONFIG_INTEL_TDX_GUEST)
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void hv_vtom_init(void);
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void hv_ivm_msr_write(u64 msr, u64 value);
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void hv_ivm_msr_read(u64 msr, u64 *value);
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#else
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static inline void hv_vtom_init(void) {}
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static inline void hv_ivm_msr_write(u64 msr, u64 value) {}
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static inline void hv_ivm_msr_read(u64 msr, u64 *value) {}
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#endif
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static inline bool hv_is_synic_msr(unsigned int reg)
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{
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return (reg >= HV_X64_MSR_SCONTROL) &&
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(reg <= HV_X64_MSR_SINT15);
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}
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static inline bool hv_is_sint_msr(unsigned int reg)
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{
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return (reg >= HV_X64_MSR_SINT0) &&
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(reg <= HV_X64_MSR_SINT15);
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}
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u64 hv_get_msr(unsigned int reg);
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void hv_set_msr(unsigned int reg, u64 value);
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u64 hv_get_non_nested_msr(unsigned int reg);
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void hv_set_non_nested_msr(unsigned int reg, u64 value);
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static __always_inline u64 hv_raw_get_msr(unsigned int reg)
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{
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return __rdmsr(reg);
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}
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#else /* CONFIG_HYPERV */
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static inline void hyperv_init(void) {}
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static inline void hyperv_setup_mmu_ops(void) {}
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static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
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static inline void clear_hv_tscchange_cb(void) {}
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static inline void hyperv_stop_tsc_emulation(void) {};
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static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
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{
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return NULL;
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}
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static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
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static inline int hyperv_flush_guest_mapping_range(u64 as,
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hyperv_fill_flush_list_func fill_func, void *data)
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{
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return -1;
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}
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static inline void hv_set_msr(unsigned int reg, u64 value) { }
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static inline u64 hv_get_msr(unsigned int reg) { return 0; }
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static inline void hv_set_non_nested_msr(unsigned int reg, u64 value) { }
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static inline u64 hv_get_non_nested_msr(unsigned int reg) { return 0; }
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#endif /* CONFIG_HYPERV */
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#ifdef CONFIG_HYPERV_VTL_MODE
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void __init hv_vtl_init_platform(void);
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int __init hv_vtl_early_init(void);
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#else
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static inline void __init hv_vtl_init_platform(void) {}
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static inline int __init hv_vtl_early_init(void) { return 0; }
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#endif
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#include <asm-generic/mshyperv.h>
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#endif
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