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When building with W=1:
arch/m68k/mm/hwtest.c:29:5: warning: no previous prototype for ‘hwreg_present’ [-Wmissing-prototypes]
29 | int hwreg_present(volatile void *regp)
| ^~~~~~~~~~~~~
arch/m68k/mm/hwtest.c:62:5: warning: no previous prototype for ‘hwreg_write’ [-Wmissing-prototypes]
62 | int hwreg_write(volatile void *regp, unsigned short val)
| ^~~~~~~~~~~
Fix this by including <asm/hwtest.h>.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/fbd87d8e8d1e8cbe7d56941a8a1d7d82b53010d0.1694613528.git.geert@linux-m68k.org
97 lines
2.6 KiB
C
97 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Tests for presence or absence of hardware registers.
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* This code was originally in atari/config.c, but I noticed
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* that it was also in drivers/nubus/nubus.c and I wanted to
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* use it in hp300/config.c, so it seemed sensible to pull it
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* out into its own file.
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*
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* The test is for use when trying to read a hardware register
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* that isn't present would cause a bus error. We set up a
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* temporary handler so that this doesn't kill the kernel.
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*
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* There is a test-by-reading and a test-by-writing; I present
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* them here complete with the comments from the original atari
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* config.c...
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* -- PMM <pmaydell@chiark.greenend.org.uk>, 05/1998
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*/
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/* This function tests for the presence of an address, specially a
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* hardware register address. It is called very early in the kernel
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* initialization process, when the VBR register isn't set up yet. On
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* an Atari, it still points to address 0, which is unmapped. So a bus
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* error would cause another bus error while fetching the exception
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* vector, and the CPU would do nothing at all. So we needed to set up
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* a temporary VBR and a vector table for the duration of the test.
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*/
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#include <linux/module.h>
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#include <asm/hwtest.h>
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int hwreg_present(volatile void *regp)
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{
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int ret = 0;
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unsigned long flags;
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long save_sp, save_vbr;
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long tmp_vectors[3];
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local_irq_save(flags);
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__asm__ __volatile__ (
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"movec %/vbr,%2\n\t"
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"movel #Lberr1,%4@(8)\n\t"
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"movec %4,%/vbr\n\t"
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"movel %/sp,%1\n\t"
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"moveq #0,%0\n\t"
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"tstb %3@\n\t"
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"nop\n\t"
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"moveq #1,%0\n"
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"Lberr1:\n\t"
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"movel %1,%/sp\n\t"
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"movec %2,%/vbr"
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: "=&d" (ret), "=&r" (save_sp), "=&r" (save_vbr)
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: "a" (regp), "a" (tmp_vectors)
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);
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local_irq_restore(flags);
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return ret;
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}
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EXPORT_SYMBOL(hwreg_present);
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/* Basically the same, but writes a value into a word register, protected
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* by a bus error handler. Returns 1 if successful, 0 otherwise.
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*/
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int hwreg_write(volatile void *regp, unsigned short val)
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{
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int ret;
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unsigned long flags;
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long save_sp, save_vbr;
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long tmp_vectors[3];
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local_irq_save(flags);
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__asm__ __volatile__ (
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"movec %/vbr,%2\n\t"
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"movel #Lberr2,%4@(8)\n\t"
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"movec %4,%/vbr\n\t"
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"movel %/sp,%1\n\t"
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"moveq #0,%0\n\t"
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"movew %5,%3@\n\t"
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"nop\n\t"
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/*
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* If this nop isn't present, 'ret' may already be loaded
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* with 1 at the time the bus error happens!
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*/
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"moveq #1,%0\n"
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"Lberr2:\n\t"
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"movel %1,%/sp\n\t"
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"movec %2,%/vbr"
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: "=&d" (ret), "=&r" (save_sp), "=&r" (save_vbr)
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: "a" (regp), "a" (tmp_vectors), "g" (val)
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);
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local_irq_restore(flags);
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return ret;
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}
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EXPORT_SYMBOL(hwreg_write);
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