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spi: dt-bindings: armada-3700: convert to dtschema
Convert txt binding of marvell armada 3700 SoC spi controller to dtschema to allow for validation. Signed-off-by: Kousik Sanagavarapu <five231003@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240417052729.6612-1-five231003@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/marvell,armada-3700-spi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Marvell Armada 3700 SPI Controller
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description:
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The SPI controller on Marvell Armada 3700 SoC.
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maintainers:
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- Kousik Sanagavarapu <five231003@gmail.com>
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allOf:
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- $ref: spi-controller.yaml#
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properties:
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compatible:
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const: marvell,armada-3700-spi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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num-cs:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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spi0: spi@10600 {
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compatible = "marvell,armada-3700-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10600 0x5d>;
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clocks = <&nb_perih_clk 7>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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num-cs = <4>;
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};
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...
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* Marvell Armada 3700 SPI Controller
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Required Properties:
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- compatible: should be "marvell,armada-3700-spi"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: The interrupt number. The interrupt specifier format depends on
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the interrupt controller and of its driver.
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- clocks: Must contain the clock source, usually from the North Bridge clocks.
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- num-cs: The number of chip selects that is supported by this SPI Controller
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- #address-cells: should be 1.
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- #size-cells: should be 0.
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Example:
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spi0: spi@10600 {
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compatible = "marvell,armada-3700-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10600 0x5d>;
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clocks = <&nb_perih_clk 7>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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num-cs = <4>;
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};
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