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rtc: max31335: add driver support
RTC driver for MAX31335 ±2ppm Automotive Real-Time Clock with Integrated MEMS Resonator. Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Link: https://lore.kernel.org/r/20231120120114.48657-2-antoniu.miclaus@analog.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Antoniu Miclaus
Alexandre Belloni
parent
5905777847
commit
dedaf03b99
@ -12986,6 +12986,14 @@ F: Documentation/devicetree/bindings/hwmon/adi,max31827.yaml
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F: Documentation/hwmon/max31827.rst
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F: drivers/hwmon/max31827.c
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MAX31335 RTC DRIVER
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M: Antoniu Miclaus <antoniu.miclaus@analog.com>
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L: linux-rtc@vger.kernel.org
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S: Supported
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W: https://ez.analog.com/linux-software-drivers
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F: Documentation/devicetree/bindings/rtc/adi,max31335.yaml
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F: drivers/rtc/rtc-max31335.c
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MAX6650 HARDWARE MONITOR AND FAN CONTROLLER DRIVER
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L: linux-hwmon@vger.kernel.org
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S: Orphan
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@ -373,6 +373,19 @@ config RTC_DRV_MAX8997
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This driver can also be built as a module. If so, the module
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will be called rtc-max8997.
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config RTC_DRV_MAX31335
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tristate "Analog Devices MAX31335"
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depends on I2C
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depends on COMMON_CLK
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depends on HWMON || HWMON=n
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select REGMAP_I2C
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help
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If you say yes here you get support for the Analog Devices
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MAX31335.
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This driver can also be built as a module. If so, the module
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will be called rtc-max31335.
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config RTC_DRV_MAX77686
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tristate "Maxim MAX77686"
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depends on MFD_MAX77686 || MFD_MAX77620 || MFD_MAX77714 || COMPILE_TEST
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@ -89,6 +89,7 @@ obj-$(CONFIG_RTC_DRV_M48T35) += rtc-m48t35.o
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obj-$(CONFIG_RTC_DRV_M48T59) += rtc-m48t59.o
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obj-$(CONFIG_RTC_DRV_M48T86) += rtc-m48t86.o
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obj-$(CONFIG_RTC_DRV_MA35D1) += rtc-ma35d1.o
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obj-$(CONFIG_RTC_DRV_MAX31335) += rtc-max31335.o
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obj-$(CONFIG_RTC_DRV_MAX6900) += rtc-max6900.o
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obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
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obj-$(CONFIG_RTC_DRV_MAX6916) += rtc-max6916.o
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707
drivers/rtc/rtc-max31335.c
Normal file
707
drivers/rtc/rtc-max31335.c
Normal file
@ -0,0 +1,707 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* RTC driver for the MAX31335
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*
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* Copyright (C) 2023 Analog Devices
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*
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* Antoniu Miclaus <antoniu.miclaus@analog.com>
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*
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*/
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#include <asm-generic/unaligned.h>
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#include <linux/bcd.h>
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/hwmon.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/rtc.h>
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#include <linux/util_macros.h>
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/* MAX31335 Register Map */
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#define MAX31335_STATUS1 0x00
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#define MAX31335_INT_EN1 0x01
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#define MAX31335_STATUS2 0x02
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#define MAX31335_INT_EN2 0x03
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#define MAX31335_RTC_RESET 0x04
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#define MAX31335_RTC_CONFIG 0x05
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#define MAX31335_RTC_CONFIG2 0x06
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#define MAX31335_TIMESTAMP_CONFIG 0x07
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#define MAX31335_TIMER_CONFIG 0x08
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#define MAX31335_SECONDS_1_128 0x09
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#define MAX31335_SECONDS 0x0A
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#define MAX31335_MINUTES 0x0B
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#define MAX31335_HOURS 0x0C
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#define MAX31335_DAY 0x0D
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#define MAX31335_DATE 0x0E
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#define MAX31335_MONTH 0x0F
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#define MAX31335_YEAR 0x0F
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#define MAX31335_ALM1_SEC 0x11
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#define MAX31335_ALM1_MIN 0x12
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#define MAX31335_ALM1_HRS 0x13
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#define MAX31335_ALM1_DAY_DATE 0x14
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#define MAX31335_ALM1_MON 0x15
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#define MAX31335_ALM1_YEAR 0x16
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#define MAX31335_ALM2_MIN 0x17
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#define MAX31335_ALM2_HRS 0x18
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#define MAX31335_ALM2_DAY_DATE 0x19
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#define MAX31335_TIMER_COUNT 0x1A
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#define MAX31335_TIMER_INIT 0x1B
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#define MAX31335_PWR_MGMT 0x1C
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#define MAX31335_TRICKLE_REG 0x1D
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#define MAX31335_AGING_OFFSET 0x1E
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#define MAX31335_TS_CONFIG 0x30
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#define MAX31335_TEMP_ALARM_HIGH_MSB 0x31
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#define MAX31335_TEMP_ALARM_HIGH_LSB 0x32
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#define MAX31335_TEMP_ALARM_LOW_MSB 0x33
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#define MAX31335_TEMP_ALARM_LOW_LSB 0x34
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#define MAX31335_TEMP_DATA_MSB 0x35
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#define MAX31335_TEMP_DATA_LSB 0x36
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#define MAX31335_TS0_SEC_1_128 0x40
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#define MAX31335_TS0_SEC 0x41
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#define MAX31335_TS0_MIN 0x42
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#define MAX31335_TS0_HOUR 0x43
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#define MAX31335_TS0_DATE 0x44
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#define MAX31335_TS0_MONTH 0x45
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#define MAX31335_TS0_YEAR 0x46
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#define MAX31335_TS0_FLAGS 0x47
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#define MAX31335_TS1_SEC_1_128 0x48
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#define MAX31335_TS1_SEC 0x49
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#define MAX31335_TS1_MIN 0x4A
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#define MAX31335_TS1_HOUR 0x4B
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#define MAX31335_TS1_DATE 0x4C
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#define MAX31335_TS1_MONTH 0x4D
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#define MAX31335_TS1_YEAR 0x4E
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#define MAX31335_TS1_FLAGS 0x4F
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#define MAX31335_TS2_SEC_1_128 0x50
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#define MAX31335_TS2_SEC 0x51
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#define MAX31335_TS2_MIN 0x52
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#define MAX31335_TS2_HOUR 0x53
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#define MAX31335_TS2_DATE 0x54
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#define MAX31335_TS2_MONTH 0x55
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#define MAX31335_TS2_YEAR 0x56
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#define MAX31335_TS2_FLAGS 0x57
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#define MAX31335_TS3_SEC_1_128 0x58
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#define MAX31335_TS3_SEC 0x59
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#define MAX31335_TS3_MIN 0x5A
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#define MAX31335_TS3_HOUR 0x5B
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#define MAX31335_TS3_DATE 0x5C
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#define MAX31335_TS3_MONTH 0x5D
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#define MAX31335_TS3_YEAR 0x5E
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#define MAX31335_TS3_FLAGS 0x5F
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/* MAX31335_STATUS1 Bit Definitions */
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#define MAX31335_STATUS1_PSDECT BIT(7)
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#define MAX31335_STATUS1_OSF BIT(6)
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#define MAX31335_STATUS1_PFAIL BIT(5)
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#define MAX31335_STATUS1_VBATLOW BIT(4)
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#define MAX31335_STATUS1_DIF BIT(3)
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#define MAX31335_STATUS1_TIF BIT(2)
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#define MAX31335_STATUS1_A2F BIT(1)
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#define MAX31335_STATUS1_A1F BIT(0)
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/* MAX31335_INT_EN1 Bit Definitions */
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#define MAX31335_INT_EN1_DOSF BIT(6)
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#define MAX31335_INT_EN1_PFAILE BIT(5)
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#define MAX31335_INT_EN1_VBATLOWE BIT(4)
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#define MAX31335_INT_EN1_DIE BIT(3)
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#define MAX31335_INT_EN1_TIE BIT(2)
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#define MAX31335_INT_EN1_A2IE BIT(1)
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#define MAX31335_INT_EN1_A1IE BIT(0)
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/* MAX31335_STATUS2 Bit Definitions */
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#define MAX31335_STATUS2_TEMP_RDY BIT(2)
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#define MAX31335_STATUS2_OTF BIT(1)
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#define MAX31335_STATUS2_UTF BIT(0)
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/* MAX31335_INT_EN2 Bit Definitions */
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#define MAX31335_INT_EN2_TEMP_RDY_EN BIT(2)
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#define MAX31335_INT_EN2_OTIE BIT(1)
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#define MAX31335_INT_EN2_UTIE BIT(0)
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/* MAX31335_RTC_RESET Bit Definitions */
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#define MAX31335_RTC_RESET_SWRST BIT(0)
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/* MAX31335_RTC_CONFIG1 Bit Definitions */
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#define MAX31335_RTC_CONFIG1_EN_IO BIT(6)
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#define MAX31335_RTC_CONFIG1_A1AC GENMASK(5, 4)
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#define MAX31335_RTC_CONFIG1_DIP BIT(3)
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#define MAX31335_RTC_CONFIG1_I2C_TIMEOUT BIT(1)
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#define MAX31335_RTC_CONFIG1_EN_OSC BIT(0)
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/* MAX31335_RTC_CONFIG2 Bit Definitions */
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#define MAX31335_RTC_CONFIG2_ENCLKO BIT(2)
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#define MAX31335_RTC_CONFIG2_CLKO_HZ GENMASK(1, 0)
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/* MAX31335_TIMESTAMP_CONFIG Bit Definitions */
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#define MAX31335_TIMESTAMP_CONFIG_TSVLOW BIT(5)
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#define MAX31335_TIMESTAMP_CONFIG_TSPWM BIT(4)
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#define MAX31335_TIMESTAMP_CONFIG_TSDIN BIT(3)
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#define MAX31335_TIMESTAMP_CONFIG_TSOW BIT(2)
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#define MAX31335_TIMESTAMP_CONFIG_TSR BIT(1)
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#define MAX31335_TIMESTAMP_CONFIG_TSE BIT(0)
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/* MAX31335_TIMER_CONFIG Bit Definitions */
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#define MAX31335_TIMER_CONFIG_TE BIT(4)
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#define MAX31335_TIMER_CONFIG_TPAUSE BIT(3)
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#define MAX31335_TIMER_CONFIG_TRPT BIT(2)
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#define MAX31335_TIMER_CONFIG_TFS GENMASK(1, 0)
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/* MAX31335_HOURS Bit Definitions */
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#define MAX31335_HOURS_F_24_12 BIT(6)
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#define MAX31335_HOURS_HR_20_AM_PM BIT(5)
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/* MAX31335_MONTH Bit Definitions */
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#define MAX31335_MONTH_CENTURY BIT(7)
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/* MAX31335_PWR_MGMT Bit Definitions */
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#define MAX31335_PWR_MGMT_PFVT BIT(0)
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/* MAX31335_TRICKLE_REG Bit Definitions */
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#define MAX31335_TRICKLE_REG_TRICKLE GENMASK(3, 1)
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#define MAX31335_TRICKLE_REG_EN_TRICKLE BIT(0)
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/* MAX31335_TS_CONFIG Bit Definitions */
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#define MAX31335_TS_CONFIG_AUTO BIT(4)
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#define MAX31335_TS_CONFIG_CONVERT_T BIT(3)
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#define MAX31335_TS_CONFIG_TSINT GENMASK(2, 0)
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/* MAX31335_TS_FLAGS Bit Definitions */
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#define MAX31335_TS_FLAGS_VLOWF BIT(3)
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#define MAX31335_TS_FLAGS_VBATF BIT(2)
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#define MAX31335_TS_FLAGS_VCCF BIT(1)
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#define MAX31335_TS_FLAGS_DINF BIT(0)
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/* MAX31335 Miscellaneous Definitions */
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#define MAX31335_TRICKLE_SCHOTTKY_DIODE 1
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#define MAX31335_TRICKLE_STANDARD_DIODE 4
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#define MAX31335_RAM_SIZE 32
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#define MAX31335_TIME_SIZE 0x07
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#define clk_hw_to_max31335(_hw) container_of(_hw, struct max31335_data, clkout)
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struct max31335_data {
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struct regmap *regmap;
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struct rtc_device *rtc;
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struct clk_hw clkout;
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};
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static const int max31335_clkout_freq[] = { 1, 64, 1024, 32768 };
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static const u16 max31335_trickle_resistors[] = {3000, 6000, 11000};
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static bool max31335_volatile_reg(struct device *dev, unsigned int reg)
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{
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/* time keeping registers */
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if (reg >= MAX31335_SECONDS &&
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reg < MAX31335_SECONDS + MAX31335_TIME_SIZE)
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return true;
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/* interrupt status register */
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if (reg == MAX31335_INT_EN1_A1IE)
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return true;
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/* temperature registers */
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if (reg == MAX31335_TEMP_DATA_MSB || MAX31335_TEMP_DATA_LSB)
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return true;
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return false;
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}
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static const struct regmap_config regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x5F,
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.volatile_reg = max31335_volatile_reg,
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};
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static int max31335_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct max31335_data *max31335 = dev_get_drvdata(dev);
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u8 date[7];
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int ret;
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ret = regmap_bulk_read(max31335->regmap, MAX31335_SECONDS, date,
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sizeof(date));
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if (ret)
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return ret;
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tm->tm_sec = bcd2bin(date[0] & 0x7f);
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tm->tm_min = bcd2bin(date[1] & 0x7f);
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tm->tm_hour = bcd2bin(date[2] & 0x3f);
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tm->tm_wday = bcd2bin(date[3] & 0x7) - 1;
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tm->tm_mday = bcd2bin(date[4] & 0x3f);
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tm->tm_mon = bcd2bin(date[5] & 0x1f) - 1;
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tm->tm_year = bcd2bin(date[6]) + 100;
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if (FIELD_GET(MAX31335_MONTH_CENTURY, date[5]))
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tm->tm_year += 100;
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return 0;
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}
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static int max31335_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct max31335_data *max31335 = dev_get_drvdata(dev);
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u8 date[7];
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date[0] = bin2bcd(tm->tm_sec);
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date[1] = bin2bcd(tm->tm_min);
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date[2] = bin2bcd(tm->tm_hour);
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date[3] = bin2bcd(tm->tm_wday + 1);
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date[4] = bin2bcd(tm->tm_mday);
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date[5] = bin2bcd(tm->tm_mon + 1);
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date[6] = bin2bcd(tm->tm_year % 100);
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if (tm->tm_year >= 200)
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date[5] |= FIELD_PREP(MAX31335_MONTH_CENTURY, 1);
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return regmap_bulk_write(max31335->regmap, MAX31335_SECONDS, date,
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sizeof(date));
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}
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static int max31335_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct max31335_data *max31335 = dev_get_drvdata(dev);
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int ret, ctrl, status;
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struct rtc_time time;
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u8 regs[6];
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ret = regmap_bulk_read(max31335->regmap, MAX31335_ALM1_SEC, regs,
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sizeof(regs));
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if (ret)
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return ret;
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alrm->time.tm_sec = bcd2bin(regs[0] & 0x7f);
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alrm->time.tm_min = bcd2bin(regs[1] & 0x7f);
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alrm->time.tm_hour = bcd2bin(regs[2] & 0x3f);
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alrm->time.tm_mday = bcd2bin(regs[3] & 0x3f);
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alrm->time.tm_mon = bcd2bin(regs[4] & 0x1f) - 1;
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alrm->time.tm_year = bcd2bin(regs[5]) + 100;
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ret = max31335_read_time(dev, &time);
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if (ret)
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return ret;
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if (time.tm_year >= 200)
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alrm->time.tm_year += 100;
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ret = regmap_read(max31335->regmap, MAX31335_INT_EN1, &ctrl);
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if (ret)
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return ret;
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ret = regmap_read(max31335->regmap, MAX31335_STATUS1, &status);
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if (ret)
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return ret;
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alrm->enabled = FIELD_GET(MAX31335_INT_EN1_A1IE, ctrl);
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alrm->pending = FIELD_GET(MAX31335_STATUS1_A1F, status);
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return 0;
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}
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static int max31335_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct max31335_data *max31335 = dev_get_drvdata(dev);
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unsigned int reg;
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u8 regs[6];
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int ret;
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regs[0] = bin2bcd(alrm->time.tm_sec);
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regs[1] = bin2bcd(alrm->time.tm_min);
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regs[2] = bin2bcd(alrm->time.tm_hour);
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regs[3] = bin2bcd(alrm->time.tm_mday);
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regs[4] = bin2bcd(alrm->time.tm_mon + 1);
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regs[5] = bin2bcd(alrm->time.tm_year % 100);
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ret = regmap_bulk_write(max31335->regmap, MAX31335_ALM1_SEC,
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regs, sizeof(regs));
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if (ret)
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return ret;
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reg = FIELD_PREP(MAX31335_INT_EN1_A1IE, alrm->enabled);
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ret = regmap_update_bits(max31335->regmap, MAX31335_INT_EN1,
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MAX31335_INT_EN1_A1IE, reg);
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if (ret)
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return ret;
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ret = regmap_update_bits(max31335->regmap, MAX31335_STATUS1,
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MAX31335_STATUS1_A1F, 0);
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return 0;
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}
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static int max31335_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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struct max31335_data *max31335 = dev_get_drvdata(dev);
|
||||
|
||||
return regmap_update_bits(max31335->regmap, MAX31335_INT_EN1,
|
||||
MAX31335_INT_EN1_A1IE, enabled);
|
||||
}
|
||||
|
||||
static irqreturn_t max31335_handle_irq(int irq, void *dev_id)
|
||||
{
|
||||
struct max31335_data *max31335 = dev_id;
|
||||
struct mutex *lock = &max31335->rtc->ops_lock;
|
||||
int ret, status;
|
||||
|
||||
mutex_lock(lock);
|
||||
|
||||
ret = regmap_read(max31335->regmap, MAX31335_STATUS1, &status);
|
||||
if (ret)
|
||||
goto exit;
|
||||
|
||||
if (FIELD_GET(MAX31335_STATUS1_A1F, status)) {
|
||||
ret = regmap_update_bits(max31335->regmap, MAX31335_STATUS1,
|
||||
MAX31335_STATUS1_A1F, 0);
|
||||
if (ret)
|
||||
goto exit;
|
||||
|
||||
rtc_update_irq(max31335->rtc, 1, RTC_AF | RTC_IRQF);
|
||||
}
|
||||
|
||||
exit:
|
||||
mutex_unlock(lock);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static const struct rtc_class_ops max31335_rtc_ops = {
|
||||
.read_time = max31335_read_time,
|
||||
.set_time = max31335_set_time,
|
||||
.read_alarm = max31335_read_alarm,
|
||||
.set_alarm = max31335_set_alarm,
|
||||
.alarm_irq_enable = max31335_alarm_irq_enable,
|
||||
};
|
||||
|
||||
static int max31335_trickle_charger_setup(struct device *dev,
|
||||
struct max31335_data *max31335)
|
||||
{
|
||||
u32 ohms, chargeable;
|
||||
int i, trickle_cfg;
|
||||
const char *diode;
|
||||
|
||||
if (device_property_read_u32(dev, "aux-voltage-chargeable",
|
||||
&chargeable))
|
||||
return 0;
|
||||
|
||||
if (device_property_read_u32(dev, "trickle-resistor-ohms", &ohms))
|
||||
return 0;
|
||||
|
||||
if (device_property_read_string(dev, "adi,tc-diode", &diode))
|
||||
return 0;
|
||||
|
||||
if (!strcmp(diode, "schottky"))
|
||||
trickle_cfg = MAX31335_TRICKLE_SCHOTTKY_DIODE;
|
||||
else if (!strcmp(diode, "standard+schottky"))
|
||||
trickle_cfg = MAX31335_TRICKLE_STANDARD_DIODE;
|
||||
else
|
||||
return dev_err_probe(dev, -EINVAL,
|
||||
"Invalid tc-diode value: %s\n", diode);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(max31335_trickle_resistors); i++)
|
||||
if (ohms == max31335_trickle_resistors[i])
|
||||
break;
|
||||
|
||||
if (i >= ARRAY_SIZE(max31335_trickle_resistors))
|
||||
return 0;
|
||||
|
||||
i = i + trickle_cfg;
|
||||
|
||||
return regmap_write(max31335->regmap, MAX31335_TRICKLE_REG,
|
||||
FIELD_PREP(MAX31335_TRICKLE_REG_TRICKLE, i) |
|
||||
FIELD_PREP(MAX31335_TRICKLE_REG_EN_TRICKLE,
|
||||
chargeable));
|
||||
}
|
||||
|
||||
static unsigned long max31335_clkout_recalc_rate(struct clk_hw *hw,
|
||||
unsigned long parent_rate)
|
||||
{
|
||||
struct max31335_data *max31335 = clk_hw_to_max31335(hw);
|
||||
unsigned int freq_mask;
|
||||
unsigned int reg;
|
||||
int ret;
|
||||
|
||||
ret = regmap_read(max31335->regmap, MAX31335_RTC_CONFIG2, ®);
|
||||
if (ret)
|
||||
return 0;
|
||||
|
||||
freq_mask = __roundup_pow_of_two(ARRAY_SIZE(max31335_clkout_freq)) - 1;
|
||||
|
||||
return max31335_clkout_freq[reg & freq_mask];
|
||||
}
|
||||
|
||||
static long max31335_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
unsigned long *prate)
|
||||
{
|
||||
int index;
|
||||
|
||||
index = find_closest(rate, max31335_clkout_freq,
|
||||
ARRAY_SIZE(max31335_clkout_freq));
|
||||
|
||||
return max31335_clkout_freq[index];
|
||||
}
|
||||
|
||||
static int max31335_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
|
||||
unsigned long parent_rate)
|
||||
{
|
||||
struct max31335_data *max31335 = clk_hw_to_max31335(hw);
|
||||
unsigned int freq_mask;
|
||||
int index;
|
||||
|
||||
index = find_closest(rate, max31335_clkout_freq,
|
||||
ARRAY_SIZE(max31335_clkout_freq));
|
||||
freq_mask = __roundup_pow_of_two(ARRAY_SIZE(max31335_clkout_freq)) - 1;
|
||||
|
||||
return regmap_update_bits(max31335->regmap, MAX31335_RTC_CONFIG2,
|
||||
freq_mask, index);
|
||||
}
|
||||
|
||||
static int max31335_clkout_enable(struct clk_hw *hw)
|
||||
{
|
||||
struct max31335_data *max31335 = clk_hw_to_max31335(hw);
|
||||
|
||||
return regmap_set_bits(max31335->regmap, MAX31335_RTC_CONFIG2,
|
||||
MAX31335_RTC_CONFIG2_ENCLKO);
|
||||
}
|
||||
|
||||
static void max31335_clkout_disable(struct clk_hw *hw)
|
||||
{
|
||||
struct max31335_data *max31335 = clk_hw_to_max31335(hw);
|
||||
|
||||
regmap_clear_bits(max31335->regmap, MAX31335_RTC_CONFIG2,
|
||||
MAX31335_RTC_CONFIG2_ENCLKO);
|
||||
}
|
||||
|
||||
static int max31335_clkout_is_enabled(struct clk_hw *hw)
|
||||
{
|
||||
struct max31335_data *max31335 = clk_hw_to_max31335(hw);
|
||||
unsigned int reg;
|
||||
int ret;
|
||||
|
||||
ret = regmap_read(max31335->regmap, MAX31335_RTC_CONFIG2, ®);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return !!(reg & MAX31335_RTC_CONFIG2_ENCLKO);
|
||||
}
|
||||
|
||||
static const struct clk_ops max31335_clkout_ops = {
|
||||
.recalc_rate = max31335_clkout_recalc_rate,
|
||||
.round_rate = max31335_clkout_round_rate,
|
||||
.set_rate = max31335_clkout_set_rate,
|
||||
.enable = max31335_clkout_enable,
|
||||
.disable = max31335_clkout_disable,
|
||||
.is_enabled = max31335_clkout_is_enabled,
|
||||
};
|
||||
|
||||
static struct clk_init_data max31335_clk_init = {
|
||||
.name = "max31335-clkout",
|
||||
.ops = &max31335_clkout_ops,
|
||||
};
|
||||
|
||||
static int max31335_nvmem_reg_read(void *priv, unsigned int offset,
|
||||
void *val, size_t bytes)
|
||||
{
|
||||
struct max31335_data *max31335 = priv;
|
||||
unsigned int reg = MAX31335_TS0_SEC_1_128 + offset;
|
||||
|
||||
return regmap_bulk_read(max31335->regmap, reg, val, bytes);
|
||||
}
|
||||
|
||||
static int max31335_nvmem_reg_write(void *priv, unsigned int offset,
|
||||
void *val, size_t bytes)
|
||||
{
|
||||
struct max31335_data *max31335 = priv;
|
||||
unsigned int reg = MAX31335_TS0_SEC_1_128 + offset;
|
||||
|
||||
return regmap_bulk_write(max31335->regmap, reg, val, bytes);
|
||||
}
|
||||
|
||||
static struct nvmem_config max31335_nvmem_cfg = {
|
||||
.reg_read = max31335_nvmem_reg_read,
|
||||
.reg_write = max31335_nvmem_reg_write,
|
||||
.word_size = 8,
|
||||
.size = MAX31335_RAM_SIZE,
|
||||
};
|
||||
|
||||
#if IS_REACHABLE(HWMON)
|
||||
static int max31335_read_temp(struct device *dev, enum hwmon_sensor_types type,
|
||||
u32 attr, int channel, long *val)
|
||||
{
|
||||
struct max31335_data *max31335 = dev_get_drvdata(dev);
|
||||
u8 reg[2];
|
||||
s16 temp;
|
||||
int ret;
|
||||
|
||||
if (type != hwmon_temp || attr != hwmon_temp_input)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
ret = regmap_bulk_read(max31335->regmap, MAX31335_TEMP_DATA_MSB,
|
||||
reg, 2);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
temp = get_unaligned_be16(reg);
|
||||
|
||||
*val = (temp / 64) * 250;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static umode_t max31335_is_visible(const void *data,
|
||||
enum hwmon_sensor_types type,
|
||||
u32 attr, int channel)
|
||||
{
|
||||
if (type == hwmon_temp && attr == hwmon_temp_input)
|
||||
return 0444;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct hwmon_channel_info *max31335_info[] = {
|
||||
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
|
||||
NULL
|
||||
};
|
||||
|
||||
static const struct hwmon_ops max31335_hwmon_ops = {
|
||||
.is_visible = max31335_is_visible,
|
||||
.read = max31335_read_temp,
|
||||
};
|
||||
|
||||
static const struct hwmon_chip_info max31335_chip_info = {
|
||||
.ops = &max31335_hwmon_ops,
|
||||
.info = max31335_info,
|
||||
};
|
||||
#endif
|
||||
|
||||
static int max31335_clkout_register(struct device *dev)
|
||||
{
|
||||
struct max31335_data *max31335 = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
if (!device_property_present(dev, "#clock-cells"))
|
||||
return regmap_clear_bits(max31335->regmap, MAX31335_RTC_CONFIG2,
|
||||
MAX31335_RTC_CONFIG2_ENCLKO);
|
||||
|
||||
max31335->clkout.init = &max31335_clk_init;
|
||||
|
||||
ret = devm_clk_hw_register(dev, &max31335->clkout);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret, "cannot register clock\n");
|
||||
|
||||
ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
|
||||
&max31335->clkout);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret, "cannot add hw provider\n");
|
||||
|
||||
max31335->clkout.clk = devm_clk_get_enabled(dev, NULL);
|
||||
if (IS_ERR(max31335->clkout.clk))
|
||||
return dev_err_probe(dev, PTR_ERR(max31335->clkout.clk),
|
||||
"cannot enable clkout\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int max31335_probe(struct i2c_client *client)
|
||||
{
|
||||
struct max31335_data *max31335;
|
||||
#if IS_REACHABLE(HWMON)
|
||||
struct device *hwmon;
|
||||
#endif
|
||||
int ret;
|
||||
|
||||
max31335 = devm_kzalloc(&client->dev, sizeof(*max31335), GFP_KERNEL);
|
||||
if (!max31335)
|
||||
return -ENOMEM;
|
||||
|
||||
max31335->regmap = devm_regmap_init_i2c(client, ®map_config);
|
||||
if (IS_ERR(max31335->regmap))
|
||||
return PTR_ERR(max31335->regmap);
|
||||
|
||||
i2c_set_clientdata(client, max31335);
|
||||
|
||||
max31335->rtc = devm_rtc_allocate_device(&client->dev);
|
||||
if (IS_ERR(max31335->rtc))
|
||||
return PTR_ERR(max31335->rtc);
|
||||
|
||||
max31335->rtc->ops = &max31335_rtc_ops;
|
||||
max31335->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
|
||||
max31335->rtc->range_max = RTC_TIMESTAMP_END_2199;
|
||||
max31335->rtc->alarm_offset_max = 24 * 60 * 60;
|
||||
|
||||
ret = max31335_clkout_register(&client->dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (client->irq > 0) {
|
||||
ret = devm_request_threaded_irq(&client->dev, client->irq,
|
||||
NULL, max31335_handle_irq,
|
||||
IRQF_ONESHOT,
|
||||
"max31335", max31335);
|
||||
if (ret) {
|
||||
dev_warn(&client->dev,
|
||||
"unable to request IRQ, alarm max31335 disabled\n");
|
||||
client->irq = 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (!client->irq)
|
||||
clear_bit(RTC_FEATURE_ALARM, max31335->rtc->features);
|
||||
|
||||
max31335_nvmem_cfg.priv = max31335;
|
||||
ret = devm_rtc_nvmem_register(max31335->rtc, &max31335_nvmem_cfg);
|
||||
if (ret)
|
||||
return dev_err_probe(&client->dev, ret,
|
||||
"cannot register rtc nvmem\n");
|
||||
|
||||
#if IS_REACHABLE(HWMON)
|
||||
hwmon = devm_hwmon_device_register_with_info(&client->dev, client->name,
|
||||
max31335,
|
||||
&max31335_chip_info,
|
||||
NULL);
|
||||
if (IS_ERR(hwmon))
|
||||
return dev_err_probe(&client->dev, PTR_ERR(hwmon),
|
||||
"cannot register hwmon device\n");
|
||||
#endif
|
||||
|
||||
ret = max31335_trickle_charger_setup(&client->dev, max31335);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return devm_rtc_register_device(max31335->rtc);
|
||||
}
|
||||
|
||||
static const struct i2c_device_id max31335_id[] = {
|
||||
{ "max31335", 0 },
|
||||
{ }
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(i2c, max31335_id);
|
||||
|
||||
static const struct of_device_id max31335_of_match[] = {
|
||||
{ .compatible = "adi,max31335" },
|
||||
{ }
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, max31335_of_match);
|
||||
|
||||
static struct i2c_driver max31335_driver = {
|
||||
.driver = {
|
||||
.name = "rtc-max31335",
|
||||
.of_match_table = max31335_of_match,
|
||||
},
|
||||
.probe = max31335_probe,
|
||||
.id_table = max31335_id,
|
||||
};
|
||||
module_i2c_driver(max31335_driver);
|
||||
|
||||
MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com>");
|
||||
MODULE_DESCRIPTION("MAX31335 RTC driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue
Block a user