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irqchip/irq-mvebu-icu: Remove platform MSI leftovers
All related domains provide MSI parent functionality, so the fallback code to the original platform MSI implementation is not longer required. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Anna-Maria Behnsen <anna-maria@linutronix.de> Signed-off-by: Shivamurthy Shastri <shivamurthy.shastri@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240623142235.881677325@linutronix.de
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fbdf14e90c
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@ -129,196 +129,6 @@ static void mvebu_icu_init(struct mvebu_icu *icu,
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writel_relaxed(msg[1].address_lo, icu->base + subset->offset_clr_al);
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writel_relaxed(msg[1].address_lo, icu->base + subset->offset_clr_al);
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}
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}
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/* Start of area to be removed once all parent chips provide MSI parent */
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struct mvebu_icu_irq_data {
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struct mvebu_icu *icu;
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unsigned int icu_group;
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unsigned int type;
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};
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static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
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{
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struct irq_data *d = irq_get_irq_data(desc->irq);
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struct mvebu_icu_msi_data *msi_data = platform_msi_get_host_data(d->domain);
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struct mvebu_icu_irq_data *icu_irqd = d->chip_data;
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struct mvebu_icu *icu = icu_irqd->icu;
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unsigned int icu_int;
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if (msg->address_lo || msg->address_hi) {
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/* One off initialization per domain */
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mvebu_icu_init(icu, msi_data, msg);
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/* Configure the ICU with irq number & type */
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icu_int = msg->data | ICU_INT_ENABLE;
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if (icu_irqd->type & IRQ_TYPE_EDGE_RISING)
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icu_int |= ICU_IS_EDGE;
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icu_int |= icu_irqd->icu_group << ICU_GROUP_SHIFT;
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} else {
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/* De-configure the ICU */
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icu_int = 0;
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}
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writel_relaxed(icu_int, icu->base + ICU_INT_CFG(d->hwirq));
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/*
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* The SATA unit has 2 ports, and a dedicated ICU entry per
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* port. The ahci sata driver supports only one irq interrupt
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* per SATA unit. To solve this conflict, we configure the 2
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* SATA wired interrupts in the south bridge into 1 GIC
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* interrupt in the north bridge. Even if only a single port
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* is enabled, if sata node is enabled, both interrupts are
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* configured (regardless of which port is actually in use).
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*/
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if (d->hwirq == ICU_SATA0_ICU_ID || d->hwirq == ICU_SATA1_ICU_ID) {
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writel_relaxed(icu_int,
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icu->base + ICU_INT_CFG(ICU_SATA0_ICU_ID));
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writel_relaxed(icu_int,
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icu->base + ICU_INT_CFG(ICU_SATA1_ICU_ID));
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}
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}
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static struct irq_chip mvebu_icu_nsr_chip = {
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.name = "ICU-NSR",
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.irq_mask = irq_chip_mask_parent,
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.irq_unmask = irq_chip_unmask_parent,
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.irq_eoi = irq_chip_eoi_parent,
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.irq_set_type = irq_chip_set_type_parent,
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.irq_set_affinity = irq_chip_set_affinity_parent,
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};
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static struct irq_chip mvebu_icu_sei_chip = {
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.name = "ICU-SEI",
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.irq_ack = irq_chip_ack_parent,
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.irq_mask = irq_chip_mask_parent,
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.irq_unmask = irq_chip_unmask_parent,
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.irq_set_type = irq_chip_set_type_parent,
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.irq_set_affinity = irq_chip_set_affinity_parent,
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};
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static int
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mvebu_icu_irq_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec,
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unsigned long *hwirq, unsigned int *type)
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{
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unsigned int param_count = static_branch_unlikely(&legacy_bindings) ? 3 : 2;
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struct mvebu_icu_msi_data *msi_data = platform_msi_get_host_data(d);
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struct mvebu_icu *icu = msi_data->icu;
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/* Check the count of the parameters in dt */
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if (WARN_ON(fwspec->param_count != param_count)) {
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dev_err(icu->dev, "wrong ICU parameter count %d\n",
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fwspec->param_count);
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return -EINVAL;
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}
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if (static_branch_unlikely(&legacy_bindings)) {
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*hwirq = fwspec->param[1];
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*type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
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if (fwspec->param[0] != ICU_GRP_NSR) {
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dev_err(icu->dev, "wrong ICU group type %x\n",
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fwspec->param[0]);
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return -EINVAL;
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}
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} else {
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*hwirq = fwspec->param[0];
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*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
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/*
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* The ICU receives level interrupts. While the NSR are also
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* level interrupts, SEI are edge interrupts. Force the type
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* here in this case. Please note that this makes the interrupt
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* handling unreliable.
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*/
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if (msi_data->subset_data->icu_group == ICU_GRP_SEI)
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*type = IRQ_TYPE_EDGE_RISING;
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}
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if (*hwirq >= ICU_MAX_IRQS) {
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dev_err(icu->dev, "invalid interrupt number %ld\n", *hwirq);
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return -EINVAL;
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}
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return 0;
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}
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static int
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mvebu_icu_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *args)
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{
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int err;
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unsigned long hwirq;
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struct irq_fwspec *fwspec = args;
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struct mvebu_icu_msi_data *msi_data = platform_msi_get_host_data(domain);
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struct mvebu_icu *icu = msi_data->icu;
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struct mvebu_icu_irq_data *icu_irqd;
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struct irq_chip *chip = &mvebu_icu_nsr_chip;
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icu_irqd = kmalloc(sizeof(*icu_irqd), GFP_KERNEL);
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if (!icu_irqd)
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return -ENOMEM;
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err = mvebu_icu_irq_domain_translate(domain, fwspec, &hwirq,
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&icu_irqd->type);
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if (err) {
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dev_err(icu->dev, "failed to translate ICU parameters\n");
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goto free_irqd;
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}
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if (static_branch_unlikely(&legacy_bindings))
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icu_irqd->icu_group = fwspec->param[0];
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else
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icu_irqd->icu_group = msi_data->subset_data->icu_group;
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icu_irqd->icu = icu;
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err = platform_msi_device_domain_alloc(domain, virq, nr_irqs);
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if (err) {
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dev_err(icu->dev, "failed to allocate ICU interrupt in parent domain\n");
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goto free_irqd;
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}
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/* Make sure there is no interrupt left pending by the firmware */
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err = irq_set_irqchip_state(virq, IRQCHIP_STATE_PENDING, false);
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if (err)
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goto free_msi;
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if (icu_irqd->icu_group == ICU_GRP_SEI)
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chip = &mvebu_icu_sei_chip;
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err = irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
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chip, icu_irqd);
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if (err) {
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dev_err(icu->dev, "failed to set the data to IRQ domain\n");
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goto free_msi;
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}
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return 0;
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free_msi:
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platform_msi_device_domain_free(domain, virq, nr_irqs);
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free_irqd:
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kfree(icu_irqd);
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return err;
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}
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static void
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mvebu_icu_irq_domain_free(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs)
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{
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struct irq_data *d = irq_get_irq_data(virq);
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struct mvebu_icu_irq_data *icu_irqd = d->chip_data;
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kfree(icu_irqd);
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platform_msi_device_domain_free(domain, virq, nr_irqs);
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}
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static const struct irq_domain_ops mvebu_icu_domain_ops = {
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.translate = mvebu_icu_irq_domain_translate,
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.alloc = mvebu_icu_irq_domain_alloc,
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.free = mvebu_icu_irq_domain_free,
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};
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/* End of removal area */
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static int mvebu_icu_msi_init(struct irq_domain *domain, struct msi_domain_info *info,
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static int mvebu_icu_msi_init(struct irq_domain *domain, struct msi_domain_info *info,
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unsigned int virq, irq_hw_number_t hwirq, msi_alloc_info_t *arg)
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unsigned int virq, irq_hw_number_t hwirq, msi_alloc_info_t *arg)
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{
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{
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@ -448,9 +258,10 @@ static const struct of_device_id mvebu_icu_subset_of_match[] = {
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static int mvebu_icu_subset_probe(struct platform_device *pdev)
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static int mvebu_icu_subset_probe(struct platform_device *pdev)
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{
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{
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const struct msi_domain_template *tmpl;
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struct mvebu_icu_msi_data *msi_data;
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struct mvebu_icu_msi_data *msi_data;
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struct device *dev = &pdev->dev;
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struct device *dev = &pdev->dev;
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struct irq_domain *irq_domain;
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bool sei;
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msi_data = devm_kzalloc(dev, sizeof(*msi_data), GFP_KERNEL);
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msi_data = devm_kzalloc(dev, sizeof(*msi_data), GFP_KERNEL);
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if (!msi_data)
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if (!msi_data)
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@ -471,22 +282,11 @@ static int mvebu_icu_subset_probe(struct platform_device *pdev)
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if (!irq_domain_get_of_node(dev->msi.domain))
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if (!irq_domain_get_of_node(dev->msi.domain))
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return -ENODEV;
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return -ENODEV;
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if (irq_domain_is_msi_parent(dev->msi.domain)) {
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sei = msi_data->subset_data->icu_group == ICU_GRP_SEI;
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bool sei = msi_data->subset_data->icu_group == ICU_GRP_SEI;
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tmpl = sei ? &mvebu_icu_sei_msi_template : &mvebu_icu_nsr_msi_template;
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const struct msi_domain_template *tmpl;
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tmpl = sei ? &mvebu_icu_sei_msi_template : &mvebu_icu_nsr_msi_template;
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if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN, tmpl,
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ICU_MAX_IRQS, NULL, msi_data)) {
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if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN, tmpl,
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ICU_MAX_IRQS, NULL, msi_data))
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return -ENOMEM;
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}
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irq_domain = platform_msi_create_device_tree_domain(dev, ICU_MAX_IRQS,
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mvebu_icu_write_msg,
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&mvebu_icu_domain_ops,
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msi_data);
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if (!irq_domain) {
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dev_err(dev, "Failed to create ICU MSI domain\n");
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dev_err(dev, "Failed to create ICU MSI domain\n");
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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