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i2c: designware: do not hold SCL low when I2C_DYNAMIC_TAR_UPDATE is not set

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When the Tx FIFO is empty and the last command has no STOP bit
set, the master holds SCL low. If I2C_DYNAMIC_TAR_UPDATE is not
set, BIT(13) MST_ON_HOLD of IC_RAW_INTR_STAT is not enabled,
causing the __i2c_dw_disable() timeout. This is quite similar to
commit 2409205acd ("i2c: designware: fix __i2c_dw_disable() in
case master is holding SCL low"). Also check BIT(7)
MST_HOLD_TX_FIFO_EMPTY in IC_STATUS, which is available when
IC_STAT_FOR_CLK_STRETCH is set.

Fixes: 2409205acd ("i2c: designware: fix __i2c_dw_disable() in case master is holding SCL low")
Co-developed-by: Xiaowu Ding <xiaowu.ding@jaguarmicro.com>
Signed-off-by: Xiaowu Ding <xiaowu.ding@jaguarmicro.com>
Co-developed-by: Angus Chen <angus.chen@jaguarmicro.com>
Signed-off-by: Angus Chen <angus.chen@jaguarmicro.com>
Signed-off-by: Liu Peibao <loven.liu@jaguarmicro.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
This commit is contained in:
Liu Peibao 2024-11-01 16:12:43 +08:00 committed by Andi Shyti
parent ab2e5c8ff2
commit 8de3e97f3d
2 changed files with 5 additions and 2 deletions
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6
drivers/i2c/busses/i2c-designware-common.c
View File

@ -524,7 +524,7 @@ int i2c_dw_set_sda_hold(struct dw_i2c_dev *dev)
void __i2c_dw_disable(struct dw_i2c_dev *dev) void __i2c_dw_disable(struct dw_i2c_dev *dev)
{ {
struct i2c_timings *t = &dev->timings; struct i2c_timings *t = &dev->timings;
unsigned int raw_intr_stats; unsigned int raw_intr_stats, ic_stats;
unsigned int enable; unsigned int enable;
int timeout = 100; int timeout = 100;
bool abort_needed; bool abort_needed;
@ -532,9 +532,11 @@ void __i2c_dw_disable(struct dw_i2c_dev *dev)
int ret; int ret;
regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_intr_stats); regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_intr_stats);
regmap_read(dev->map, DW_IC_STATUS, &ic_stats);
regmap_read(dev->map, DW_IC_ENABLE, &enable); regmap_read(dev->map, DW_IC_ENABLE, &enable);
abort_needed = raw_intr_stats & DW_IC_INTR_MST_ON_HOLD; abort_needed = (raw_intr_stats & DW_IC_INTR_MST_ON_HOLD) ||
(ic_stats & DW_IC_STATUS_MASTER_HOLD_TX_FIFO_EMPTY);
if (abort_needed) { if (abort_needed) {
if (!(enable & DW_IC_ENABLE_ENABLE)) { if (!(enable & DW_IC_ENABLE_ENABLE)) {
regmap_write(dev->map, DW_IC_ENABLE, DW_IC_ENABLE_ENABLE); regmap_write(dev->map, DW_IC_ENABLE, DW_IC_ENABLE_ENABLE);

1
drivers/i2c/busses/i2c-designware-core.h
View File

@ -116,6 +116,7 @@
#define DW_IC_STATUS_RFNE BIT(3) #define DW_IC_STATUS_RFNE BIT(3)
#define DW_IC_STATUS_MASTER_ACTIVITY BIT(5) #define DW_IC_STATUS_MASTER_ACTIVITY BIT(5)
#define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6) #define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6)
#define DW_IC_STATUS_MASTER_HOLD_TX_FIFO_EMPTY BIT(7)
#define DW_IC_SDA_HOLD_RX_SHIFT 16 #define DW_IC_SDA_HOLD_RX_SHIFT 16
#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, 16) #define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, 16)