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spi: pxa2xx: Remove DMA parameters from struct chip_data
The DMA related fields are set once and never modified. It effectively repeats the content of the same fields in struct pxa2xx_spi_controller. With that, remove DMA parameters from struct chip_data. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240417110334.2671228-8-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -68,8 +68,6 @@ pxa2xx_spi_dma_prepare_one(struct driver_data *drv_data,
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enum dma_transfer_direction dir,
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struct spi_transfer *xfer)
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{
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struct chip_data *chip =
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spi_get_ctldata(drv_data->controller->cur_msg->spi);
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enum dma_slave_buswidth width;
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struct dma_slave_config cfg;
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struct dma_chan *chan;
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@ -94,14 +92,14 @@ pxa2xx_spi_dma_prepare_one(struct driver_data *drv_data,
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if (dir == DMA_MEM_TO_DEV) {
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cfg.dst_addr = drv_data->ssp->phys_base + SSDR;
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cfg.dst_addr_width = width;
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cfg.dst_maxburst = chip->dma_burst_size;
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cfg.dst_maxburst = drv_data->controller_info->dma_burst_size;
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sgt = &xfer->tx_sg;
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chan = drv_data->controller->dma_tx;
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} else {
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cfg.src_addr = drv_data->ssp->phys_base + SSDR;
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cfg.src_addr_width = width;
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cfg.src_maxburst = chip->dma_burst_size;
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cfg.src_maxburst = drv_data->controller_info->dma_burst_size;
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sgt = &xfer->rx_sg;
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chan = drv_data->controller->dma_rx;
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@ -225,19 +223,3 @@ void pxa2xx_spi_dma_release(struct driver_data *drv_data)
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controller->dma_tx = NULL;
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}
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}
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int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
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struct spi_device *spi,
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u8 bits_per_word, u32 *burst_code,
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u32 *threshold)
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{
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struct driver_data *drv_data = spi_controller_get_devdata(spi->controller);
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u32 dma_burst_size = drv_data->controller_info->dma_burst_size;
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/* We use the default the DMA burst size and FIFO thresholds for now */
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*burst_code = dma_burst_size;
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*threshold = SSCR1_RxTresh(RX_THRESH_DFLT)
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| SSCR1_TxTresh(TX_THRESH_DFLT);
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return 0;
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}
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@ -934,11 +934,11 @@ static bool pxa2xx_spi_can_dma(struct spi_controller *controller,
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struct spi_device *spi,
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struct spi_transfer *xfer)
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{
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struct chip_data *chip = spi_get_ctldata(spi);
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struct driver_data *drv_data = spi_controller_get_devdata(controller);
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return chip->enable_dma &&
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return drv_data->controller_info->enable_dma &&
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xfer->len <= MAX_DMA_LEN &&
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xfer->len >= chip->dma_burst_size;
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xfer->len >= drv_data->controller_info->dma_burst_size;
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}
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static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
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@ -947,9 +947,8 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
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{
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struct driver_data *drv_data = spi_controller_get_devdata(controller);
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struct chip_data *chip = spi_get_ctldata(spi);
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u32 dma_thresh = chip->dma_threshold;
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u32 dma_burst = chip->dma_burst_size;
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u32 change_mask = pxa2xx_spi_get_ssrc1_change_mask(drv_data);
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u32 dma_thresh;
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u32 clk_div;
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u8 bits;
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u32 speed;
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@ -959,7 +958,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
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int dma_mapped;
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/* Check if we can DMA this transfer */
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if (transfer->len > MAX_DMA_LEN && chip->enable_dma) {
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if (transfer->len > MAX_DMA_LEN && drv_data->controller_info->enable_dma) {
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/* Warn ... we force this to PIO mode */
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dev_warn_ratelimited(&spi->dev,
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"DMA disabled for transfer length %u greater than %d\n",
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@ -995,19 +994,8 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
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drv_data->read = drv_data->rx ? u32_reader : null_reader;
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drv_data->write = drv_data->tx ? u32_writer : null_writer;
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}
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/*
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* If bits per word is changed in DMA mode, then must check
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* the thresholds and burst also.
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*/
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if (chip->enable_dma) {
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if (pxa2xx_spi_set_dma_burst_and_threshold(chip,
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spi,
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bits, &dma_burst,
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&dma_thresh))
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dev_warn_ratelimited(&spi->dev,
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"DMA burst size reduced to match bits_per_word\n");
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}
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dma_thresh = SSCR1_RxTresh(RX_THRESH_DFLT) | SSCR1_TxTresh(TX_THRESH_DFLT);
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dma_mapped = controller->can_dma &&
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controller->can_dma(controller, spi, transfer) &&
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controller->cur_msg_mapped;
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@ -1213,7 +1201,6 @@ static int setup(struct spi_device *spi)
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if (!chip)
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return -ENOMEM;
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chip->enable_dma = drv_data->controller_info->enable_dma;
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chip->timeout = TIMOUT_DFLT;
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}
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@ -1236,20 +1223,6 @@ static int setup(struct spi_device *spi)
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chip->lpss_tx_threshold = tx_thres;
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}
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if (chip->enable_dma) {
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/* Set up legal burst and threshold for DMA */
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if (pxa2xx_spi_set_dma_burst_and_threshold(chip, spi,
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spi->bits_per_word,
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&chip->dma_burst_size,
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&chip->dma_threshold)) {
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dev_warn(&spi->dev,
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"in setup: DMA burst size reduced to match bits_per_word\n");
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}
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dev_dbg(&spi->dev,
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"in setup: DMA burst size set to %u\n",
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chip->dma_burst_size);
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}
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switch (drv_data->ssp_type) {
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case QUARK_X1000_SSP:
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chip->threshold = (QUARK_X1000_SSCR1_RxTresh(rx_thres)
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@ -1439,6 +1412,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
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if (IS_ERR(platform_info))
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return dev_err_probe(dev, PTR_ERR(platform_info), "missing platform data\n");
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}
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dev_dbg(dev, "DMA burst size set to %u\n", platform_info->dma_burst_size);
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ssp = pxa_ssp_request(pdev->id, pdev->name);
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if (!ssp)
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@ -79,9 +79,6 @@ struct chip_data {
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u32 cr1;
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u32 dds_rate;
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u32 timeout;
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u8 enable_dma;
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u32 dma_burst_size;
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u32 dma_threshold;
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u32 threshold;
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u16 lpss_rx_threshold;
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u16 lpss_tx_threshold;
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@ -142,10 +139,5 @@ extern void pxa2xx_spi_dma_start(struct driver_data *drv_data);
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extern void pxa2xx_spi_dma_stop(struct driver_data *drv_data);
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extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data);
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extern void pxa2xx_spi_dma_release(struct driver_data *drv_data);
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extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
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struct spi_device *spi,
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u8 bits_per_word,
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u32 *burst_code,
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u32 *threshold);
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#endif /* SPI_PXA2XX_H */
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