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Merge patch series "riscv: Improve KASAN coverage to fix unit tests"
Samuel Holland <samuel.holland@sifive.com> says: This series fixes two areas where uninstrumented assembly routines caused gaps in KASAN coverage on RISC-V, which were caught by KUnit tests. The KASAN KUnit test suite passes after applying this series. This series fixes the following test failures: # kasan_strings: EXPECTATION FAILED at mm/kasan/kasan_test.c:1520 KASAN failure expected in "kasan_int_result = strcmp(ptr, "2")", but none occurred # kasan_strings: EXPECTATION FAILED at mm/kasan/kasan_test.c:1524 KASAN failure expected in "kasan_int_result = strlen(ptr)", but none occurred not ok 60 kasan_strings # kasan_bitops_generic: EXPECTATION FAILED at mm/kasan/kasan_test.c:1531 KASAN failure expected in "set_bit(nr, addr)", but none occurred # kasan_bitops_generic: EXPECTATION FAILED at mm/kasan/kasan_test.c:1533 KASAN failure expected in "clear_bit(nr, addr)", but none occurred # kasan_bitops_generic: EXPECTATION FAILED at mm/kasan/kasan_test.c:1535 KASAN failure expected in "clear_bit_unlock(nr, addr)", but none occurred # kasan_bitops_generic: EXPECTATION FAILED at mm/kasan/kasan_test.c:1536 KASAN failure expected in "__clear_bit_unlock(nr, addr)", but none occurred # kasan_bitops_generic: EXPECTATION FAILED at mm/kasan/kasan_test.c:1537 KASAN failure expected in "change_bit(nr, addr)", but none occurred # kasan_bitops_generic: EXPECTATION FAILED at mm/kasan/kasan_test.c:1543 KASAN failure expected in "test_and_set_bit(nr, addr)", but none occurred # kasan_bitops_generic: EXPECTATION FAILED at mm/kasan/kasan_test.c:1545 KASAN failure expected in "test_and_set_bit_lock(nr, addr)", but none occurred # kasan_bitops_generic: EXPECTATION FAILED at mm/kasan/kasan_test.c:1546 KASAN failure expected in "test_and_clear_bit(nr, addr)", but none occurred # kasan_bitops_generic: EXPECTATION FAILED at mm/kasan/kasan_test.c:1548 KASAN failure expected in "test_and_change_bit(nr, addr)", but none occurred not ok 61 kasan_bitops_generic Samuel Holland (2): riscv: Omit optimized string routines when using KASAN riscv: Enable bitops instrumentation arch/riscv/include/asm/bitops.h | 43 ++++++++++++++++++--------------- arch/riscv/include/asm/string.h | 2 ++ arch/riscv/kernel/riscv_ksyms.c | 3 --- arch/riscv/lib/Makefile | 2 ++ arch/riscv/lib/strcmp.S | 1 + arch/riscv/lib/strlen.S | 1 + arch/riscv/lib/strncmp.S | 1 + arch/riscv/purgatory/Makefile | 2 ++ 8 files changed, 32 insertions(+), 23 deletions(-) * b4-shazam-merge: riscv: Enable bitops instrumentation riscv: Omit optimized string routines when using KASAN Link: https://lore.kernel.org/r/20240801033725.28816-1-samuel.holland@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
commit
5835437609
@ -222,44 +222,44 @@ static __always_inline int variable_fls(unsigned int x)
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#define __NOT(x) (~(x))
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/**
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* test_and_set_bit - Set a bit and return its old value
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* arch_test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation may be reordered on other architectures than x86.
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*/
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static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
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static inline int arch_test_and_set_bit(int nr, volatile unsigned long *addr)
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{
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return __test_and_op_bit(or, __NOP, nr, addr);
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}
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/**
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* test_and_clear_bit - Clear a bit and return its old value
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* arch_test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to clear
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* @addr: Address to count from
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*
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* This operation can be reordered on other architectures other than x86.
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*/
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static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
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static inline int arch_test_and_clear_bit(int nr, volatile unsigned long *addr)
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{
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return __test_and_op_bit(and, __NOT, nr, addr);
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}
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/**
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* test_and_change_bit - Change a bit and return its old value
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* arch_test_and_change_bit - Change a bit and return its old value
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* @nr: Bit to change
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
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static inline int arch_test_and_change_bit(int nr, volatile unsigned long *addr)
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{
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return __test_and_op_bit(xor, __NOP, nr, addr);
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}
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/**
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* set_bit - Atomically set a bit in memory
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* arch_set_bit - Atomically set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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@ -270,13 +270,13 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static inline void set_bit(int nr, volatile unsigned long *addr)
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static inline void arch_set_bit(int nr, volatile unsigned long *addr)
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{
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__op_bit(or, __NOP, nr, addr);
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}
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/**
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* clear_bit - Clears a bit in memory
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* arch_clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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@ -284,13 +284,13 @@ static inline void set_bit(int nr, volatile unsigned long *addr)
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* on non x86 architectures, so if you are writing portable code,
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* make sure not to rely on its reordering guarantees.
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*/
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static inline void clear_bit(int nr, volatile unsigned long *addr)
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static inline void arch_clear_bit(int nr, volatile unsigned long *addr)
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{
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__op_bit(and, __NOT, nr, addr);
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}
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/**
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* change_bit - Toggle a bit in memory
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* arch_change_bit - Toggle a bit in memory
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* @nr: Bit to change
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* @addr: Address to start counting from
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*
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@ -298,40 +298,40 @@ static inline void clear_bit(int nr, volatile unsigned long *addr)
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static inline void change_bit(int nr, volatile unsigned long *addr)
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static inline void arch_change_bit(int nr, volatile unsigned long *addr)
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{
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__op_bit(xor, __NOP, nr, addr);
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}
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/**
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* test_and_set_bit_lock - Set a bit and return its old value, for lock
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* arch_test_and_set_bit_lock - Set a bit and return its old value, for lock
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and provides acquire barrier semantics.
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* It can be used to implement bit locks.
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*/
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static inline int test_and_set_bit_lock(
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static inline int arch_test_and_set_bit_lock(
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unsigned long nr, volatile unsigned long *addr)
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{
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return __test_and_op_bit_ord(or, __NOP, nr, addr, .aq);
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}
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/**
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* clear_bit_unlock - Clear a bit in memory, for unlock
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* arch_clear_bit_unlock - Clear a bit in memory, for unlock
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* This operation is atomic and provides release barrier semantics.
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*/
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static inline void clear_bit_unlock(
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static inline void arch_clear_bit_unlock(
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unsigned long nr, volatile unsigned long *addr)
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{
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__op_bit_ord(and, __NOT, nr, addr, .rl);
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}
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/**
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* __clear_bit_unlock - Clear a bit in memory, for unlock
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* arch___clear_bit_unlock - Clear a bit in memory, for unlock
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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@ -345,13 +345,13 @@ static inline void clear_bit_unlock(
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* non-atomic property here: it's a lot more instructions and we still have to
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* provide release semantics anyway.
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*/
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static inline void __clear_bit_unlock(
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static inline void arch___clear_bit_unlock(
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unsigned long nr, volatile unsigned long *addr)
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{
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clear_bit_unlock(nr, addr);
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arch_clear_bit_unlock(nr, addr);
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}
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static inline bool xor_unlock_is_negative_byte(unsigned long mask,
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static inline bool arch_xor_unlock_is_negative_byte(unsigned long mask,
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volatile unsigned long *addr)
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{
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unsigned long res;
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@ -369,6 +369,9 @@ static inline bool xor_unlock_is_negative_byte(unsigned long mask,
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#undef __NOT
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#undef __AMO
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#include <asm-generic/bitops/instrumented-atomic.h>
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#include <asm-generic/bitops/instrumented-lock.h>
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#include <asm-generic/bitops/non-atomic.h>
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#include <asm-generic/bitops/le.h>
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#include <asm-generic/bitops/ext2-atomic.h>
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@ -19,6 +19,7 @@ extern asmlinkage void *__memcpy(void *, const void *, size_t);
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extern asmlinkage void *memmove(void *, const void *, size_t);
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extern asmlinkage void *__memmove(void *, const void *, size_t);
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#if !(defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS))
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#define __HAVE_ARCH_STRCMP
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extern asmlinkage int strcmp(const char *cs, const char *ct);
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@ -27,6 +28,7 @@ extern asmlinkage __kernel_size_t strlen(const char *);
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#define __HAVE_ARCH_STRNCMP
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extern asmlinkage int strncmp(const char *cs, const char *ct, size_t count);
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#endif
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/* For those files which don't want to check by kasan. */
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#if defined(CONFIG_KASAN) && !defined(__SANITIZE_ADDRESS__)
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@ -12,9 +12,6 @@
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EXPORT_SYMBOL(memset);
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EXPORT_SYMBOL(memcpy);
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EXPORT_SYMBOL(memmove);
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EXPORT_SYMBOL(strcmp);
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EXPORT_SYMBOL(strlen);
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EXPORT_SYMBOL(strncmp);
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EXPORT_SYMBOL(__memset);
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EXPORT_SYMBOL(__memcpy);
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EXPORT_SYMBOL(__memmove);
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@ -3,9 +3,11 @@ lib-y += delay.o
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lib-y += memcpy.o
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lib-y += memset.o
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lib-y += memmove.o
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ifeq ($(CONFIG_KASAN_GENERIC)$(CONFIG_KASAN_SW_TAGS),)
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lib-y += strcmp.o
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lib-y += strlen.o
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lib-y += strncmp.o
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endif
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lib-y += csum.o
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ifeq ($(CONFIG_MMU), y)
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lib-$(CONFIG_RISCV_ISA_V) += uaccess_vector.o
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@ -121,3 +121,4 @@ strcmp_zbb:
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#endif
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SYM_FUNC_END(strcmp)
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SYM_FUNC_ALIAS(__pi_strcmp, strcmp)
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EXPORT_SYMBOL(strcmp)
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@ -131,3 +131,4 @@ strlen_zbb:
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#endif
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SYM_FUNC_END(strlen)
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SYM_FUNC_ALIAS(__pi_strlen, strlen)
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EXPORT_SYMBOL(strlen)
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#endif
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SYM_FUNC_END(strncmp)
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SYM_FUNC_ALIAS(__pi_strncmp, strncmp)
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EXPORT_SYMBOL(strncmp)
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@ -1,7 +1,9 @@
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# SPDX-License-Identifier: GPL-2.0
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purgatory-y := purgatory.o sha256.o entry.o string.o ctype.o memcpy.o memset.o
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ifeq ($(CONFIG_KASAN_GENERIC)$(CONFIG_KASAN_SW_TAGS),)
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purgatory-y += strcmp.o strlen.o strncmp.o
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endif
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targets += $(purgatory-y)
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PURGATORY_OBJS = $(addprefix $(obj)/,$(purgatory-y))
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