2022-07-11 08:17:20 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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//
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// VCPU stall detector.
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// Copyright (C) Google, 2022
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#include <linux/cpu.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/nmi.h>
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#include <linux/of.h>
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#include <linux/param.h>
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#include <linux/percpu.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define VCPU_STALL_REG_STATUS (0x00)
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#define VCPU_STALL_REG_LOAD_CNT (0x04)
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#define VCPU_STALL_REG_CURRENT_CNT (0x08)
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#define VCPU_STALL_REG_CLOCK_FREQ_HZ (0x0C)
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#define VCPU_STALL_REG_LEN (0x10)
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#define VCPU_STALL_DEFAULT_CLOCK_HZ (10)
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#define VCPU_STALL_MAX_CLOCK_HZ (100)
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#define VCPU_STALL_DEFAULT_TIMEOUT_SEC (8)
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#define VCPU_STALL_MAX_TIMEOUT_SEC (600)
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struct vcpu_stall_detect_config {
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u32 clock_freq_hz;
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u32 stall_timeout_sec;
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2024-07-03 15:37:32 +00:00
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int ppi_irq;
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2022-07-11 08:17:20 +00:00
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void __iomem *membase;
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struct platform_device *dev;
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enum cpuhp_state hp_online;
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};
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struct vcpu_stall_priv {
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struct hrtimer vcpu_hrtimer;
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bool is_initialized;
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};
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/* The vcpu stall configuration structure which applies to all the CPUs */
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static struct vcpu_stall_detect_config vcpu_stall_config;
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#define vcpu_stall_reg_write(vcpu, reg, value) \
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writel_relaxed((value), \
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(void __iomem *)(vcpu_stall_config.membase + \
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(vcpu) * VCPU_STALL_REG_LEN + (reg)))
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static struct vcpu_stall_priv __percpu *vcpu_stall_detectors;
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static enum hrtimer_restart
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vcpu_stall_detect_timer_fn(struct hrtimer *hrtimer)
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{
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u32 ticks, ping_timeout_ms;
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/* Reload the stall detector counter register every
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* `ping_timeout_ms` to prevent the virtual device
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* from decrementing it to 0. The virtual device decrements this
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* register at 'clock_freq_hz' frequency.
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*/
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ticks = vcpu_stall_config.clock_freq_hz *
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vcpu_stall_config.stall_timeout_sec;
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vcpu_stall_reg_write(smp_processor_id(),
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VCPU_STALL_REG_LOAD_CNT, ticks);
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ping_timeout_ms = vcpu_stall_config.stall_timeout_sec *
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MSEC_PER_SEC / 2;
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hrtimer_forward_now(hrtimer,
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ms_to_ktime(ping_timeout_ms));
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return HRTIMER_RESTART;
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}
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2024-07-03 15:37:32 +00:00
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static irqreturn_t vcpu_stall_detector_irq(int irq, void *dev)
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{
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panic("vCPU stall detector");
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return IRQ_HANDLED;
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}
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2022-07-11 08:17:20 +00:00
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static int start_stall_detector_cpu(unsigned int cpu)
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{
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u32 ticks, ping_timeout_ms;
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struct vcpu_stall_priv *vcpu_stall_detector =
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this_cpu_ptr(vcpu_stall_detectors);
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struct hrtimer *vcpu_hrtimer = &vcpu_stall_detector->vcpu_hrtimer;
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vcpu_stall_reg_write(cpu, VCPU_STALL_REG_CLOCK_FREQ_HZ,
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vcpu_stall_config.clock_freq_hz);
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/* Compute the number of ticks required for the stall detector
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* counter register based on the internal clock frequency and the
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* timeout value given from the device tree.
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*/
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ticks = vcpu_stall_config.clock_freq_hz *
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vcpu_stall_config.stall_timeout_sec;
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vcpu_stall_reg_write(cpu, VCPU_STALL_REG_LOAD_CNT, ticks);
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/* Enable the internal clock and start the stall detector */
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vcpu_stall_reg_write(cpu, VCPU_STALL_REG_STATUS, 1);
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/* Pet the stall detector at half of its expiration timeout
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* to prevent spurious resets.
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*/
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ping_timeout_ms = vcpu_stall_config.stall_timeout_sec *
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MSEC_PER_SEC / 2;
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hrtimer_init(vcpu_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
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vcpu_hrtimer->function = vcpu_stall_detect_timer_fn;
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vcpu_stall_detector->is_initialized = true;
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hrtimer_start(vcpu_hrtimer, ms_to_ktime(ping_timeout_ms),
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HRTIMER_MODE_REL_PINNED);
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return 0;
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}
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static int stop_stall_detector_cpu(unsigned int cpu)
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{
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struct vcpu_stall_priv *vcpu_stall_detector =
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per_cpu_ptr(vcpu_stall_detectors, cpu);
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if (!vcpu_stall_detector->is_initialized)
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return 0;
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/* Disable the stall detector for the current CPU */
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hrtimer_cancel(&vcpu_stall_detector->vcpu_hrtimer);
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vcpu_stall_reg_write(cpu, VCPU_STALL_REG_STATUS, 0);
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vcpu_stall_detector->is_initialized = false;
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return 0;
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}
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static int vcpu_stall_detect_probe(struct platform_device *pdev)
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{
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2024-07-03 15:37:32 +00:00
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int ret, irq;
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2022-07-11 08:17:20 +00:00
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struct resource *r;
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void __iomem *membase;
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u32 clock_freq_hz = VCPU_STALL_DEFAULT_CLOCK_HZ;
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u32 stall_timeout_sec = VCPU_STALL_DEFAULT_TIMEOUT_SEC;
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struct device_node *np = pdev->dev.of_node;
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vcpu_stall_detectors = devm_alloc_percpu(&pdev->dev,
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typeof(struct vcpu_stall_priv));
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if (!vcpu_stall_detectors)
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return -ENOMEM;
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membase = devm_platform_get_and_ioremap_resource(pdev, 0, &r);
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if (IS_ERR(membase)) {
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dev_err(&pdev->dev, "Failed to get memory resource\n");
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return PTR_ERR(membase);
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}
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if (!of_property_read_u32(np, "clock-frequency", &clock_freq_hz)) {
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if (!(clock_freq_hz > 0 &&
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clock_freq_hz < VCPU_STALL_MAX_CLOCK_HZ)) {
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dev_warn(&pdev->dev, "clk out of range\n");
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clock_freq_hz = VCPU_STALL_DEFAULT_CLOCK_HZ;
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}
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}
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if (!of_property_read_u32(np, "timeout-sec", &stall_timeout_sec)) {
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if (!(stall_timeout_sec > 0 &&
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stall_timeout_sec < VCPU_STALL_MAX_TIMEOUT_SEC)) {
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dev_warn(&pdev->dev, "stall timeout out of range\n");
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stall_timeout_sec = VCPU_STALL_DEFAULT_TIMEOUT_SEC;
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}
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}
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vcpu_stall_config = (struct vcpu_stall_detect_config) {
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.membase = membase,
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.clock_freq_hz = clock_freq_hz,
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2024-07-03 15:37:32 +00:00
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.stall_timeout_sec = stall_timeout_sec,
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.ppi_irq = -1,
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2022-07-11 08:17:20 +00:00
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};
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2024-07-03 15:37:32 +00:00
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irq = platform_get_irq_optional(pdev, 0);
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if (irq > 0) {
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ret = request_percpu_irq(irq,
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vcpu_stall_detector_irq,
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"vcpu_stall_detector",
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vcpu_stall_detectors);
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if (ret)
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goto err;
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vcpu_stall_config.ppi_irq = irq;
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}
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2022-07-11 08:17:20 +00:00
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ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
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"virt/vcpu_stall_detector:online",
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start_stall_detector_cpu,
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stop_stall_detector_cpu);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to install cpu hotplug");
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goto err;
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}
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vcpu_stall_config.hp_online = ret;
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return 0;
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err:
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2024-07-03 15:37:32 +00:00
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if (vcpu_stall_config.ppi_irq > 0)
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free_percpu_irq(vcpu_stall_config.ppi_irq,
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vcpu_stall_detectors);
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2022-07-11 08:17:20 +00:00
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return ret;
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}
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2024-02-21 09:53:53 +00:00
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static void vcpu_stall_detect_remove(struct platform_device *pdev)
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2022-07-11 08:17:20 +00:00
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{
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int cpu;
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cpuhp_remove_state(vcpu_stall_config.hp_online);
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2024-07-03 15:37:32 +00:00
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if (vcpu_stall_config.ppi_irq > 0)
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free_percpu_irq(vcpu_stall_config.ppi_irq,
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vcpu_stall_detectors);
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2022-07-11 08:17:20 +00:00
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for_each_possible_cpu(cpu)
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stop_stall_detector_cpu(cpu);
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}
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static const struct of_device_id vcpu_stall_detect_of_match[] = {
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{ .compatible = "qemu,vcpu-stall-detector", },
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{}
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};
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MODULE_DEVICE_TABLE(of, vcpu_stall_detect_of_match);
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static struct platform_driver vcpu_stall_detect_driver = {
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.probe = vcpu_stall_detect_probe,
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2024-02-21 09:53:53 +00:00
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.remove_new = vcpu_stall_detect_remove,
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2022-07-11 08:17:20 +00:00
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = vcpu_stall_detect_of_match,
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},
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};
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module_platform_driver(vcpu_stall_detect_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Sebastian Ene <sebastianene@google.com>");
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MODULE_DESCRIPTION("VCPU stall detector");
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