mirror/gcc
1
0
Fork 0
mirror of https://github.com/gcc-mirror/gcc.git synced 2024-11-21 13:40:47 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

libatomic: Improve ifunc selection on AArch64

Browse Source 
Add support for ifunc selection based on CPUID register.  Neoverse N1 supports
atomic 128-bit load/store, so use the FEAT_USCAT ifunc like newer Neoverse
cores.

Reviewed-by: Kyrylo.Tkachov@arm.com

libatomic:
	* config/linux/aarch64/host-config.h (ifunc1): Use CPUID in ifunc
	selection.
This commit is contained in:
Wilco Dijkstra 2023-11-10 14:06:50 +00:00
parent 6aaf72ff53
commit f880bdc271
1 changed files with 25 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
libatomic/config/linux/aarch64/host-config.h
View File

@ -26,7 +26,7 @@
#ifdef HWCAP_USCAT
# if N == 16
# define IFUNC_COND_1 (hwcap & HWCAP_USCAT)
# define IFUNC_COND_1 ifunc1 (hwcap)
# else
# define IFUNC_COND_1 (hwcap & HWCAP_ATOMICS)
# endif
@ -41,4 +41,28 @@
#endif /* HAVE_IFUNC */
#ifdef HWCAP_USCAT
#define MIDR_IMPLEMENTOR(midr) (((midr) >> 24) & 255)
#define MIDR_PARTNUM(midr) (((midr) >> 4) & 0xfff)
static inline bool
ifunc1 (unsigned long hwcap)
{
if (hwcap & HWCAP_USCAT)
return true;
if (!(hwcap & HWCAP_CPUID))
return false;
unsigned long midr;
asm volatile ("mrs %0, midr_el1" : "=r" (midr));
/* Neoverse N1 supports atomic 128-bit load/store. */
if (MIDR_IMPLEMENTOR (midr) == 'A' && MIDR_PARTNUM (midr) == 0xd0c)
return true;
return false;
}
#endif
#include_next <host-config.h>