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AVR: target/114981 - Support __builtin_powi[l] / __powidf2.
This supports __powidf2 by means of a double wrapper for already existing f7_powi (renamed to __f7_powi by f7-renames.h). It tweaks the implementation so that it does not perform trivial multiplications with 1.0 any more, but instead uses a move. It also fixes the last statement of f7_powi, which was wrong. Notice that f7_powi was unused until now. PR target/114981 libgcc/config/avr/libf7/ * libf7-common.mk (F7_ASM_PARTS): Add D_powi * libf7-asm.sx (F7MOD_D_powi_, __powidf2): New module and function. * libf7.c (f7_powi): Fix last (wrong) statement. Tweak trivial multiplications with 1.0. gcc/testsuite/ * gcc.target/avr/pr114981-powil.c: New test.
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gcc/testsuite/gcc.target/avr/pr114981-powil.c
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33
gcc/testsuite/gcc.target/avr/pr114981-powil.c
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@ -0,0 +1,33 @@
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/* { dg-do run { target { ! avr_tiny } } } */
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/* { dg-additional-options "-Os" } */
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const long double vals[] =
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{
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0.0625L, -0.125L, 0.25L, -0.5L,
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1.0L,
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-2.0L, 4.0L, -8.0L, 16.0L
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};
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#define ARRAY_SIZE(X) ((int) (sizeof(X) / sizeof(*X)))
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__attribute__((noinline,noclone))
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void test1 (long double x)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE (vals); ++i)
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{
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long double val0 = vals[i];
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long double val1 = __builtin_powil (x, i - 4);
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__asm ("" : "+r" (val0));
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if (val0 != val1)
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__builtin_exit (__LINE__);
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}
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}
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int main (void)
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{
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test1 (-2.0L);
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return 0;
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}
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@ -1877,4 +1877,16 @@ ENDF call_ddd
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#include "f7-wraps.h"
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#include "f7-wraps.h"
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;;; Some additional, singular wraps that don't match any pattern.
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;; double __powidf2 (double, int) ; __builtin_powi
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#ifdef F7MOD_D_powi_
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_DEFUN __powidf2
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.global F7_NAME(powi)
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ldi ZH, hi8(gs(F7_NAME(powi)))
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ldi ZL, lo8(gs(F7_NAME(powi)))
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F7jmp call_ddx
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_ENDF __powidf2
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#endif /* F7MOD_D_powi_ */
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#endif /* !AVR_TINY */
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#endif /* !AVR_TINY */
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@ -22,7 +22,7 @@ F7_ASM_PARTS += addsub_mant_scaled store load
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F7_ASM_PARTS += to_integer to_unsigned clz normalize_with_carry normalize
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F7_ASM_PARTS += to_integer to_unsigned clz normalize_with_carry normalize
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F7_ASM_PARTS += store_expo sqrt16 sqrt_approx div
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F7_ASM_PARTS += store_expo sqrt16 sqrt_approx div
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F7_ASM_PARTS += D_class D_fma
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F7_ASM_PARTS += D_class D_fma D_powi
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F7_ASM_PARTS += D_isnan D_isinf D_isfinite D_signbit D_copysign D_neg D_fabs
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F7_ASM_PARTS += D_isnan D_isinf D_isfinite D_signbit D_copysign D_neg D_fabs
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F7_ASM_PARTS += call_dd call_ddd
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F7_ASM_PARTS += call_dd call_ddd
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@ -1752,20 +1752,33 @@ void f7_powi (f7_t *cc, const f7_t *aa, int ii)
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{
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{
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uint16_t u16 = ii;
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uint16_t u16 = ii;
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f7_t xx27, *xx2 = &xx27;
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f7_t xx27, *xx2 = &xx27;
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bool cc_is_one = true;
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bool expo_is_neg = false;
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if (ii < 0)
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if (ii < 0)
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u16 = -u16;
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{
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u16 = -u16;
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expo_is_neg = true;
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}
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f7_copy (xx2, aa);
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f7_copy (xx2, aa);
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f7_set_u16 (cc, 1);
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while (1)
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while (1)
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{
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{
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if (u16 & 1)
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if (u16 & 1)
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f7_Imul (cc, xx2);
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{
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if (cc_is_one)
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{
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// C *= X2 simplifies to C = X2.
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f7_copy (cc, xx2);
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cc_is_one = false;
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}
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else
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f7_Imul (cc, xx2);
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}
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if (! f7_is_nonzero (cc))
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if (! cc_is_one
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&& ! f7_is_nonzero (cc))
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break;
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break;
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u16 >>= 1;
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u16 >>= 1;
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@ -1774,8 +1787,10 @@ void f7_powi (f7_t *cc, const f7_t *aa, int ii)
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f7_Isquare (xx2);
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f7_Isquare (xx2);
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}
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}
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if (ii < 0)
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if (cc_is_one)
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f7_div1 (xx2, aa);
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f7_set_u16 (cc, 1);
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else if (expo_is_neg)
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f7_div1 (cc, cc);
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}
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}
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#endif // F7MOD_powi_
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#endif // F7MOD_powi_
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