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x86: "sse4arg" adjustments
Record common properties in other attributes' default calculations: There's always a 1-byte immediate, and they're always encoded in a VEX3- like manner (note that "prefix_extra" already evaluates to 1 in this case). The drop now (or already previously) redundant explicit attributes, adding "mode" ones where they were missing. Furthermore use "sse4arg" consistently for all VPCOM* insns; so far signed comparisons did use it, while unsigned ones used "ssecmp". Note that while they have (not counting the explicit or implicit immediate operand) they really only have 3 operands, the operator is also counted in those patterns. That's relevant for establishing the "memory" attribute's value, and at the same time benign when there are only register operands. Note that despite also having 4 operands, multiply-add insns aren't affected by this change, as they use "ssemuladd" for "type". gcc/ * config/i386/i386.md (length_immediate): Handle "sse4arg". (prefix): Likewise. (*xop_pcmov_<mode>): Add "mode" attribute. * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep", "prefix_extra", and "length_immediate" attributes. (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg". (*xop_pcmov_<mode>): Add "mode" attribute. * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode" attribute. (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep", "prefix_extra", and "length_immediate" attributes. (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg". (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra", and "length_immediate" attributes. Switch "type" to "sse4arg". (xop_pcom_tf<mode>3): Likewise. (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
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328796dec4
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@ -536,6 +536,8 @@
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(cond [(eq_attr "type" "incdec,setcc,icmov,str,lea,other,multi,idiv,leave,
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bitmanip,imulx,msklog,mskmov")
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(const_int 0)
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(eq_attr "type" "sse4arg")
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(const_int 1)
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(eq_attr "unit" "i387,sse,mmx")
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(const_int 0)
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(eq_attr "type" "alu,alu1,negnot,imovx,ishift,ishiftx,ishift1,
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@ -635,6 +637,8 @@
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(const_string "vex")
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(eq_attr "mode" "XI,V16SF,V8DF")
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(const_string "evex")
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(eq_attr "type" "sse4arg")
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(const_string "vex")
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]
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(const_string "orig")))
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@ -23292,7 +23296,8 @@
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(match_operand:MODEF 3 "register_operand" "x")))]
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"TARGET_XOP"
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"vpcmov\t{%1, %3, %2, %0|%0, %2, %3, %1}"
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[(set_attr "type" "sse4arg")])
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[(set_attr "type" "sse4arg")
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(set_attr "mode" "TI")])
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;; These versions of the min/max patterns are intentionally ignorant of
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;; their behavior wrt -0.0 and NaN (via the commutative operand mark).
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@ -2909,10 +2909,6 @@
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"TARGET_XOP"
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"vpcom%Y1<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
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[(set_attr "type" "sse4arg")
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(set_attr "prefix_data16" "0")
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(set_attr "prefix_rep" "0")
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(set_attr "prefix_extra" "2")
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(set_attr "length_immediate" "1")
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(set_attr "mode" "TI")])
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(define_insn "*xop_maskcmp<mode>3"
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@ -2923,10 +2919,6 @@
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"TARGET_XOP"
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"vpcom%Y1<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
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[(set_attr "type" "sse4arg")
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(set_attr "prefix_data16" "0")
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(set_attr "prefix_rep" "0")
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(set_attr "prefix_extra" "2")
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(set_attr "length_immediate" "1")
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(set_attr "mode" "TI")])
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(define_insn "*xop_maskcmp_uns<mode>3"
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@ -2936,11 +2928,7 @@
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(match_operand:MMXMODEI 3 "register_operand" "x")]))]
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"TARGET_XOP"
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"vpcom%Y1u<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
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[(set_attr "type" "ssecmp")
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(set_attr "prefix_data16" "0")
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(set_attr "prefix_rep" "0")
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(set_attr "prefix_extra" "2")
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(set_attr "length_immediate" "1")
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[(set_attr "type" "sse4arg")
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(set_attr "mode" "TI")])
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(define_insn "*xop_maskcmp_uns<mode>3"
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@ -2950,11 +2938,7 @@
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(match_operand:VI_16_32 3 "register_operand" "x")]))]
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"TARGET_XOP"
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"vpcom%Y1u<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
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[(set_attr "type" "ssecmp")
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(set_attr "prefix_data16" "0")
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(set_attr "prefix_rep" "0")
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(set_attr "prefix_extra" "2")
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(set_attr "length_immediate" "1")
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[(set_attr "type" "sse4arg")
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(set_attr "mode" "TI")])
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(define_expand "vec_cmp<mode><mode>"
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@ -3144,7 +3128,8 @@
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(match_operand:MMXMODE124 2 "register_operand" "x")))]
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"TARGET_XOP && TARGET_MMX_WITH_SSE"
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"vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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[(set_attr "type" "sse4arg")])
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[(set_attr "type" "sse4arg")
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(set_attr "mode" "TI")])
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(define_insn "*xop_pcmov_<mode>"
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[(set (match_operand:VI_16_32 0 "register_operand" "=x")
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@ -3154,7 +3139,8 @@
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(match_operand:VI_16_32 2 "register_operand" "x")))]
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"TARGET_XOP"
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"vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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[(set_attr "type" "sse4arg")])
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[(set_attr "type" "sse4arg")
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(set_attr "mode" "TI")])
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;; XOP permute instructions
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(define_insn "mmx_ppermv64"
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@ -24879,7 +24879,8 @@
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(match_operand:V_128_256 2 "nonimmediate_operand" "xm,x")))]
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"TARGET_XOP"
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"vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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[(set_attr "type" "sse4arg")])
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[(set_attr "type" "sse4arg")
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(set_attr "mode" "<sseinsnmode>")])
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;; Recognize XOP's vpcmov from canonical (xor (and (xor t f) c) f)
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(define_split
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@ -25797,10 +25798,6 @@
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"TARGET_XOP"
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"vpcom%Y1<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}"
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[(set_attr "type" "sse4arg")
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(set_attr "prefix_data16" "0")
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(set_attr "prefix_rep" "0")
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(set_attr "prefix_extra" "2")
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(set_attr "length_immediate" "1")
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(set_attr "mode" "TI")])
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(define_insn "xop_maskcmp_uns<mode>3"
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@ -25810,11 +25807,7 @@
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(match_operand:VI_128 3 "nonimmediate_operand" "xm")]))]
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"TARGET_XOP"
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"vpcom%Y1u<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}"
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[(set_attr "type" "ssecmp")
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(set_attr "prefix_data16" "0")
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(set_attr "prefix_rep" "0")
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(set_attr "prefix_extra" "2")
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(set_attr "length_immediate" "1")
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[(set_attr "type" "sse4arg")
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(set_attr "mode" "TI")])
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;; Version of pcom*u* that is called from the intrinsics that allows pcomequ*
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@ -25829,10 +25822,7 @@
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UNSPEC_XOP_UNSIGNED_CMP))]
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"TARGET_XOP"
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"vpcom%Y1u<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}"
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[(set_attr "type" "ssecmp")
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(set_attr "prefix_data16" "0")
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(set_attr "prefix_extra" "2")
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(set_attr "length_immediate" "1")
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[(set_attr "type" "sse4arg")
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(set_attr "mode" "TI")])
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;; Pcomtrue and pcomfalse support. These are useless instructions, but are
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@ -25850,10 +25840,7 @@
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? "vpcomtrue<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
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: "vpcomfalse<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}");
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}
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[(set_attr "type" "ssecmp")
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(set_attr "prefix_data16" "0")
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(set_attr "prefix_extra" "2")
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(set_attr "length_immediate" "1")
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[(set_attr "type" "sse4arg")
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(set_attr "mode" "TI")])
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(define_insn "xop_vpermil2<mode>3"
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@ -25867,7 +25854,6 @@
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"TARGET_XOP"
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"vpermil2<ssemodesuffix>\t{%4, %3, %2, %1, %0|%0, %1, %2, %3, %4}"
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[(set_attr "type" "sse4arg")
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(set_attr "length_immediate" "1")
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(set_attr "mode" "<MODE>")])
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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