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AVR: Support new built-in function __builtin_avr_mask1.
gcc/ * config/avr/builtins.def (MASK1): New DEF_BUILTIN. * config/avr/avr.cc (avr_rtx_costs_1): Handle rtx costs for expressions like __builtin_avr_mask1. (avr_init_builtins) <uintQI_ftype_uintQI_uintQI>: New tree type. (avr_expand_builtin) [AVR_BUILTIN_MASK1]: Diagnose unexpected forms. (avr_fold_builtin) [AVR_BUILTIN_MASK1]: Handle case. * config/avr/avr.md (gen_mask1): New expand helper. (mask1_0x01_split, mask1_0x80_split, mask1_0xfe_split): New insn-and-split. (*mask1_0x01, *mask1_0x80, *mask1_0xfe): New insns. * doc/extend.texi (AVR Built-in Functions) <__builtin_avr_mask1>: Document new built-in function. gcc/testsuite/ * gcc.target/avr/torture/builtin-mask1.c: New test.
This commit is contained in:
Georg-Johann Lay
parent
8d6994f33a
commit
9116490c1b
@ -13135,6 +13135,16 @@ avr_rtx_costs_1 (rtx x, machine_mode mode, int outer_code,
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switch (mode)
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{
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case E_QImode:
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if (speed
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&& XEXP (x, 0) == const1_rtx
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&& GET_CODE (XEXP (x, 1)) == AND)
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{
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// "*mask1_0x01"
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// Leave the space costs alone as they are smaller than 7 here.
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*total = COSTS_N_INSNS (7);
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return true;
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}
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if (!CONST_INT_P (XEXP (x, 1)))
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{
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*total = COSTS_N_INSNS (!speed ? 4 : 17);
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@ -13308,6 +13318,15 @@ avr_rtx_costs_1 (rtx x, machine_mode mode, int outer_code,
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break;
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case E_HImode:
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if (CONST_INT_P (XEXP (x, 0))
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&& INTVAL (XEXP (x, 0)) == 128
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&& GET_CODE (XEXP (x, 1)) == AND)
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{
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// "*mask1_0x80"
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*total = COSTS_N_INSNS (7);
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return true;
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}
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if (!CONST_INT_P (XEXP (x, 1)))
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{
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*total = COSTS_N_INSNS (!speed ? 5 : 41);
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@ -15796,6 +15815,11 @@ avr_init_builtins (void)
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= build_function_type_list (unsigned_intQI_type_node,
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unsigned_intQI_type_node,
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NULL_TREE);
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tree uintQI_ftype_uintQI_uintQI
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= build_function_type_list (unsigned_intQI_type_node,
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unsigned_intQI_type_node,
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unsigned_intQI_type_node,
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NULL_TREE);
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tree uintHI_ftype_uintQI_uintQI
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= build_function_type_list (unsigned_intHI_type_node,
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unsigned_intQI_type_node,
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@ -16080,6 +16104,22 @@ avr_expand_builtin (tree exp, rtx target, rtx /*subtarget*/,
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return NULL_RTX;
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}
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case AVR_BUILTIN_MASK1:
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{
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arg0 = CALL_EXPR_ARG (exp, 0);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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int ival = CONST_INT_P (op0) ? 0xff & INTVAL (op0) : 0;
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if (ival != 0x01 && ival != 0x7f && ival != 0x80 && ival != 0xfe)
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{
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error ("%s expects a compile time integer constant of 0x01, "
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"0x7f, 0x80 or 0xfe as first argument", bname);
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return target;
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}
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break;
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}
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case AVR_BUILTIN_INSERT_BITS:
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{
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arg0 = CALL_EXPR_ARG (exp, 0);
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@ -16247,6 +16287,28 @@ avr_fold_builtin (tree fndecl, int /*n_args*/, tree *arg, bool /*ignore*/)
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return build1 (VIEW_CONVERT_EXPR, val_type, arg[0]);
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case AVR_BUILTIN_MASK1:
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{
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tree tmask = arg[0];
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tree toffs = arg[1];
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if (TREE_CODE (tmask) == INTEGER_CST
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&& TREE_CODE (toffs) == INTEGER_CST)
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{
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switch (0xff & TREE_INT_CST_LOW (tmask))
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{
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case 0x01:
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case 0xfe:
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return fold_build2 (LROTATE_EXPR, val_type, arg[0], toffs);
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case 0x80:
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case 0x7f:
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return fold_build2 (RROTATE_EXPR, val_type, arg[0], toffs);
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}
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}
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break;
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} // AVR_BUILTIN_MASK1
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case AVR_BUILTIN_INSERT_BITS:
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{
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tree tbits = arg[1];
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@ -8163,6 +8163,144 @@
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[(set_attr "adjust_len" "insert_bits")])
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;; __builtin_avr_mask1
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(define_expand "gen_mask1"
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[(parallel [(match_operand:QI 0 "register_operand")
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(match_operand 1 "const_int_operand")
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(match_operand:QI 2 "register_operand")])]
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""
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{
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switch (INTVAL (operands[1]) & 0xff)
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{
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case 0x01:
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emit (gen_mask1_0x01_split (operands[0], operands[2]));
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break;
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case 0x80:
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emit (gen_mask1_0x80_split (operands[0], operands[2]));
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break;
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case 0xfe:
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emit (gen_mask1_0xfe_split (operands[0], operands[2]));
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break;
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case 0x7f:
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// Sequences like below don't work for 0x7f because
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// there is no ASL instruction.
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emit (gen_mask1_0x80_split (operands[0], operands[2]));
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emit (gen_one_cmplqi2 (operands[0], operands[0]));
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break;
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default:
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gcc_unreachable();
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}
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DONE;
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})
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(define_insn_and_split "mask1_0x01_split"
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[(set (match_operand:QI 0 "register_operand" "=&d")
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(ashift:QI (const_int 1)
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(and:QI (match_operand:QI 1 "register_operand" "r")
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(const_int 7))))]
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""
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0)
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(rotate:QI (const_int 1)
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(match_dup 1)))
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(clobber (reg:CC REG_CC))])])
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(define_insn "*mask1_0x01"
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[(set (match_operand:QI 0 "register_operand" "=&d")
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(rotate:QI (const_int 1)
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(match_operand:QI 1 "register_operand" "r")))
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(clobber (reg:CC REG_CC))]
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"reload_completed"
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{
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return "ldi %0,1" CR_TAB
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"sbrc %1,1" CR_TAB
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"ldi %0,4" CR_TAB
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"sbrc %1,0" CR_TAB
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"lsl %0" CR_TAB
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"sbrc %1,2" CR_TAB
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"swap %0";
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}
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[(set_attr "length" "7")])
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;; Use a representation as chosen by insn combine.
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(define_insn_and_split "mask1_0x80_split"
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[(set (match_operand:QI 0 "register_operand" "=&d")
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(subreg:QI (ashiftrt:HI (const_int 128)
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(and:QI (match_operand:QI 1 "register_operand" "r")
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(const_int 7)))
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0))]
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""
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0)
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(rotatert:QI (const_int -128)
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(match_dup 1)))
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(clobber (reg:CC REG_CC))])])
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(define_insn "*mask1_0x80"
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[(set (match_operand:QI 0 "register_operand" "=&d")
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(rotatert:QI (const_int -128)
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(match_operand:QI 1 "register_operand" "r")))
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(clobber (reg:CC REG_CC))]
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"reload_completed"
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{
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return "ldi %0,0x80" CR_TAB
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"sbrc %1,1" CR_TAB
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"ldi %0,0x20" CR_TAB
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"sbrc %1,0" CR_TAB
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"lsr %0" CR_TAB
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"sbrc %1,2" CR_TAB
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"swap %0";
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}
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[(set_attr "length" "7")])
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(define_insn_and_split ""
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[(set (match_operand:QI 0 "register_operand" "=&d")
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(not:QI (rotate:QI (const_int -2)
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(and:QI (match_operand:QI 1 "register_operand" "r")
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(const_int 7)))))]
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""
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0)
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(rotate:QI (const_int 1)
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(match_dup 1)))
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(clobber (reg:CC REG_CC))])])
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(define_insn_and_split "mask1_0xfe_split"
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[(set (match_operand:QI 0 "register_operand" "=&d")
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(rotate:QI (const_int -2)
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(and:QI (match_operand:QI 1 "register_operand" "r")
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(const_int 7))))]
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""
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0)
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(rotate:QI (const_int -2)
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(match_dup 1)))
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(clobber (reg:CC REG_CC))])])
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(define_insn "*mask1_0xfe"
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[(set (match_operand:QI 0 "register_operand" "=&d")
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(rotate:QI (const_int -2)
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(match_operand:QI 1 "register_operand" "r")))
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(clobber (reg:CC REG_CC))]
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"reload_completed"
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{
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return "ldi %0,0xfd" CR_TAB
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"sbrc %1,1" CR_TAB
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"ldi %0,0xf7" CR_TAB
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"sbrs %1,0" CR_TAB
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"asr %0" CR_TAB
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"sbrc %1,2" CR_TAB
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"swap %0";
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}
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[(set_attr "length" "7")])
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;; __builtin_avr_flash_segment
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;; Just a helper for the next "official" expander.
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@ -52,6 +52,7 @@ DEF_BUILTIN (FMULSU, 2, intHI_ftype_intQI_uintQI, fmulsu, NULL)
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DEF_BUILTIN (DELAY_CYCLES, -1, void_ftype_uintSI, nothing, NULL)
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DEF_BUILTIN (NOPS, -1, void_ftype_uintSI, nothing, NULL)
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DEF_BUILTIN (MASK1, 2, uintQI_ftype_uintQI_uintQI, gen_mask1, NULL)
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DEF_BUILTIN (INSERT_BITS, 3, uintQI_ftype_uintSI_uintQI_uintQI, insert_bits, NULL)
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DEF_BUILTIN (FLASH_SEGMENT, 1, intQI_ftype_const_memx_ptr, flash_segment, NULL)
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@ -16974,6 +16974,23 @@ __builtin_avr_insert_bits (0x01234567, bits, 0);
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@end smallexample
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@enddefbuiltin
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@defbuiltin{uint8_t __builtin_avr_mask1 (uint8_t @var{mask}, uint8_t @var{offs})}
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Rotate the 8-bit constant value @var{mask} by an offset of @var{offs},
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where @var{mask} is in @{ 0x01, 0xfe, 0x7f, 0x80 @}.
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This built-in can be use as an alternative to 8-bit expressions like
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@code{1 << offs} when their computation consumes too much
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time, and @var{offs} is known to be in the range 0@dots{}7.
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@example
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__builtin_avr_mask1 (1, offs) // same like 1 << offs
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__builtin_avr_mask1 (~1, offs) // same like ~(1 << offs)
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__builtin_avr_mask1 (0x80, offs) // same like 0x80 >> offs
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__builtin_avr_mask1 (~0x80, offs) // same like ~(0x80 >> offs)
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@end example
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The open coded C versions take at least @code{5 + 4 * @var{offs}} cycles
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(and 5 instructions), whereas the built-in takes 7 cycles and instructions
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(8 cycles and instructions in the case of @code{@var{mask} = 0x7f}).
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@enddefbuiltin
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@defbuiltin{void __builtin_avr_nops (uint16_t @var{count})}
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Insert @var{count} @code{NOP} instructions.
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The number of instructions must be a compile-time integer constant.
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118
gcc/testsuite/gcc.target/avr/torture/builtin-mask1.c
Normal file
118
gcc/testsuite/gcc.target/avr/torture/builtin-mask1.c
Normal file
@ -0,0 +1,118 @@
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/* { dg-do run } */
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typedef __UINT8_TYPE__ u8;
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typedef __INT8_TYPE__ i8;
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#define NI __attribute__((noipa))
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NI u8 mask_01_0 (void) { return __builtin_avr_mask1 (1, 0); }
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NI u8 mask_01_1 (void) { return __builtin_avr_mask1 (1, 1); }
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NI u8 mask_01_2 (void) { return __builtin_avr_mask1 (1, 2); }
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NI u8 mask_01_3 (void) { return __builtin_avr_mask1 (1, 3); }
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NI u8 mask_01_4 (void) { return __builtin_avr_mask1 (1, 4); }
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NI u8 mask_01_5 (void) { return __builtin_avr_mask1 (1, 5); }
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NI u8 mask_01_6 (void) { return __builtin_avr_mask1 (1, 6); }
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NI u8 mask_01_7 (void) { return __builtin_avr_mask1 (1, 7); }
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NI u8 mask_01_8 (void) { return __builtin_avr_mask1 (1, 8); }
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NI u8 mask_01_9 (void) { return __builtin_avr_mask1 (1, 9); }
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NI u8 mask_7f_0 (void) { return __builtin_avr_mask1 (0x7f, 0); }
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NI u8 mask_7f_1 (void) { return __builtin_avr_mask1 (0x7f, 1); }
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NI u8 mask_7f_2 (void) { return __builtin_avr_mask1 (0x7f, 2); }
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NI u8 mask_7f_3 (void) { return __builtin_avr_mask1 (0x7f, 3); }
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NI u8 mask_7f_4 (void) { return __builtin_avr_mask1 (0x7f, 4); }
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NI u8 mask_7f_5 (void) { return __builtin_avr_mask1 (0x7f, 5); }
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NI u8 mask_7f_6 (void) { return __builtin_avr_mask1 (0x7f, 6); }
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NI u8 mask_7f_7 (void) { return __builtin_avr_mask1 (0x7f, 7); }
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NI u8 mask_7f_8 (void) { return __builtin_avr_mask1 (0x7f, 8); }
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NI u8 mask_80_0 (void) { return __builtin_avr_mask1 (0x80, 0); }
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NI u8 mask_80_1 (void) { return __builtin_avr_mask1 (0x80, 1); }
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NI u8 mask_80_2 (void) { return __builtin_avr_mask1 (0x80, 2); }
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NI u8 mask_80_3 (void) { return __builtin_avr_mask1 (0x80, 3); }
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NI u8 mask_80_4 (void) { return __builtin_avr_mask1 (0x80, 4); }
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NI u8 mask_80_5 (void) { return __builtin_avr_mask1 (0x80, 5); }
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NI u8 mask_80_6 (void) { return __builtin_avr_mask1 (0x80, 6); }
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NI u8 mask_80_7 (void) { return __builtin_avr_mask1 (0x80, 7); }
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NI u8 mask_80_8 (void) { return __builtin_avr_mask1 (0x80, 8); }
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NI u8 mask_fe_0 (void) { return __builtin_avr_mask1 (0xfe, 0); }
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NI u8 mask_fe_1 (void) { return __builtin_avr_mask1 (0xfe, 1); }
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NI u8 mask_fe_2 (void) { return __builtin_avr_mask1 (0xfe, 2); }
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NI u8 mask_fe_3 (void) { return __builtin_avr_mask1 (0xfe, 3); }
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NI u8 mask_fe_4 (void) { return __builtin_avr_mask1 (0xfe, 4); }
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NI u8 mask_fe_5 (void) { return __builtin_avr_mask1 (0xfe, 5); }
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NI u8 mask_fe_6 (void) { return __builtin_avr_mask1 (0xfe, 6); }
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NI u8 mask_fe_7 (void) { return __builtin_avr_mask1 (0xfe, 7); }
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NI u8 mask_fe_8 (void) { return __builtin_avr_mask1 (0xfe, 8); }
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NI u8 mask_0x01 (u8 x) { return __builtin_avr_mask1 (0x01, x); }
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NI u8 mask_0x80 (u8 x) { return __builtin_avr_mask1 (0x80, x); }
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NI u8 mask_0x7f (u8 x) { return __builtin_avr_mask1 (0x7f, x); }
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NI u8 mask_0xfe (u8 x) { return __builtin_avr_mask1 (0xfe, x); }
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NI u8 not_mask_0x01 (u8 x) { return ~ __builtin_avr_mask1 (0x01, x); }
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NI u8 not_mask_0xfe (u8 x) { return ~ __builtin_avr_mask1 (0xfe, x); }
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NI u8 not_mask_0x80 (u8 x) { return ~ __builtin_avr_mask1 (0x80, x); }
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NI u8 not_mask_0x7f (u8 x) { return ~ __builtin_avr_mask1 (0x7f, x); }
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NI u8 rotl (u8 x, u8 y)
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{
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u8 i;
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for (i = 0; i < (7 & y); ++i)
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x = (x << 1) | (x >> 7);
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return x;
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}
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NI u8 rotr (u8 x, u8 y)
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{
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u8 i;
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for (i = 0; i < (7 & y); ++i)
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x = (x >> 1) | (x << 7);
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return x;
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}
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NI u8 fun_0x01 (u8 x) { return rotl (0x01, x); }
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NI u8 fun_0x80 (u8 x) { return rotr (0x80, x); }
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NI u8 fun_0x7f (u8 x) { return rotr (0x7f, x); }
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NI u8 fun_0xfe (u8 x) { return rotl (0xfe, x); }
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NI u8 fun2r (u8 x)
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{
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x &= 7;
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return 0x80 >> x;
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}
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NI u8 fun2l (u8 x)
|
||||
{
|
||||
x &= 7;
|
||||
return 1 << x;
|
||||
}
|
||||
|
||||
int main (void)
|
||||
{
|
||||
i8 x;
|
||||
for (x = -10; x < 10; ++x)
|
||||
{
|
||||
if (mask_0x01 (x) != fun_0x01 (x)) __builtin_exit (__LINE__);
|
||||
if (mask_0xfe (x) != fun_0xfe (x)) __builtin_exit (__LINE__);
|
||||
if (mask_0x80 (x) != fun_0x80 (x)) __builtin_exit (__LINE__);
|
||||
if (mask_0x7f (x) != fun_0x7f (x)) __builtin_exit (__LINE__);
|
||||
|
||||
if (not_mask_0x01 (x) != fun_0xfe (x)) __builtin_exit (__LINE__);
|
||||
if (not_mask_0xfe (x) != fun_0x01 (x)) __builtin_exit (__LINE__);
|
||||
if (not_mask_0x80 (x) != fun_0x7f (x)) __builtin_exit (__LINE__);
|
||||
if (not_mask_0x7f (x) != fun_0x80 (x)) __builtin_exit (__LINE__);
|
||||
|
||||
if (fun2r (x) != fun_0x80 (x)) __builtin_exit (__LINE__);
|
||||
if (fun2l (x) != fun_0x01 (x)) __builtin_exit (__LINE__);
|
||||
}
|
||||
|
||||
if (mask_01_0 () != mask_01_8 ())__builtin_exit (__LINE__);
|
||||
if (mask_fe_0 () != mask_fe_8 ())__builtin_exit (__LINE__);
|
||||
if (mask_80_0 () != mask_80_8 ())__builtin_exit (__LINE__);
|
||||
if (mask_7f_0 () != mask_7f_8 ())__builtin_exit (__LINE__);
|
||||
|
||||
return 0;
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user