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m68hc11-protos.h: Add a prototype for m68hcc_auto_inc_p.
* config/m68hc11/m68hc11-protos.h: Add a prototype for m68hcc_auto_inc_p. Remove the prototypes for tst_operand, cmp_operand, stack_register_operand, d_register_operand, hard_addr_reg_operand, splitable_operand, m68hc11_logical_operator, m68hc11_arith_operator, m68hc11_non_shift_operator, m68hc11_shift_operator, m68hc11_unary_operator, m68hc11_eq_compare_operator, non_push_operand, hard_reg_operand, and reg_or_some_mem_operand. * config/m68hc11/m68hc11.c (m68hcc_auto_inc_p): Make it extern. (tst_operand, cmp_operand, non_push_operand, splitable_operand, reg_or_some_mem_operand, stack_register_operand, d_register_operand, hard_addr_reg_operand, hard_reg_operand, m68hc11_eq_compare_operator, m68hc11_logical_operator, m68hc11_arith_operator, m68hc11_non_shift_operator, m68hc11_shift_operator, m68hc11_unary_operator): Move to predicates.md. * config/m68hc11/m68hc11.h (PREDICATE_CODES): Remove. * config/m68hc11/m68hc11.md: Include predicates.md. * config/m68hc11/predicates.md: New. From-SVN: r97455
This commit is contained in:
Kazu Hirata
Kazu Hirata
parent
8c1d21e66a
commit
577e5d76f9
@ -3,6 +3,30 @@
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* config/fr30/fr30.h (PREDICATE_CODES): Remove
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fp_displacement_operand, sp_displacement_operand.
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* config/m68hc11/m68hc11-protos.h: Add a prototype for
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m68hcc_auto_inc_p.
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Remove the prototypes for tst_operand, cmp_operand,
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stack_register_operand, d_register_operand,
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hard_addr_reg_operand, splitable_operand,
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m68hc11_logical_operator, m68hc11_arith_operator,
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m68hc11_non_shift_operator, m68hc11_shift_operator,
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m68hc11_unary_operator, m68hc11_eq_compare_operator,
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non_push_operand, hard_reg_operand, and
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reg_or_some_mem_operand.
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* config/m68hc11/m68hc11.c (m68hcc_auto_inc_p): Make it
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extern.
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(tst_operand, cmp_operand, non_push_operand,
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splitable_operand, reg_or_some_mem_operand,
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stack_register_operand, d_register_operand,
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hard_addr_reg_operand, hard_reg_operand,
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m68hc11_eq_compare_operator, m68hc11_logical_operator,
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m68hc11_arith_operator, m68hc11_non_shift_operator,
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m68hc11_shift_operator, m68hc11_unary_operator): Move to
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predicates.md.
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* config/m68hc11/m68hc11.h (PREDICATE_CODES): Remove.
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* config/m68hc11/m68hc11.md: Include predicates.md.
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* config/m68hc11/predicates.md: New.
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2005-04-02 Alexandre Oliva <aoliva@redhat.com>
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PR debug/19345
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@ -1,5 +1,6 @@
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/* Prototypes for exported functions defined in m68hc11.c
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
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Free Software Foundation, Inc.
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Contributed by Stephane Carrez (stcarrez@nerim.fr)
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This file is part of GCC.
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@ -41,6 +42,8 @@ extern void m68hc11_function_arg_advance (CUMULATIVE_ARGS*,
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#endif
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#ifdef RTX_CODE
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extern int m68hc11_auto_inc_p (rtx);
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extern void m68hc11_initialize_trampoline (rtx, rtx, rtx);
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extern rtx m68hc11_expand_compare_and_branch (enum rtx_code, rtx, rtx, rtx);
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@ -90,8 +93,6 @@ extern int m68hc11_indirect_p (rtx, enum machine_mode);
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extern int go_if_legitimate_address2 (rtx, enum machine_mode, int);
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extern int reg_or_indexed_operand (rtx,enum machine_mode);
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extern int tst_operand (rtx,enum machine_mode);
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extern int cmp_operand (rtx,enum machine_mode);
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extern int memory_indexed_operand (rtx, enum machine_mode);
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extern void m68hc11_split_logical (enum machine_mode, int, rtx*);
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@ -101,21 +102,8 @@ extern int m68hc11_register_indirect_p (rtx, enum machine_mode);
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extern int symbolic_memory_operand (rtx, enum machine_mode);
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extern int memory_reload_operand (rtx, enum machine_mode);
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extern int stack_register_operand (rtx, enum machine_mode);
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extern int d_register_operand (rtx, enum machine_mode);
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extern int hard_addr_reg_operand (rtx, enum machine_mode);
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extern int splitable_operand (rtx, enum machine_mode);
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extern int arith_src_operand (rtx, enum machine_mode);
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extern int m68hc11_logical_operator (rtx, enum machine_mode);
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extern int m68hc11_arith_operator (rtx, enum machine_mode);
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extern int m68hc11_non_shift_operator (rtx, enum machine_mode);
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extern int m68hc11_shift_operator (rtx, enum machine_mode);
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extern int m68hc11_unary_operator (rtx, enum machine_mode);
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extern int m68hc11_eq_compare_operator (rtx, enum machine_mode);
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extern int non_push_operand (rtx, enum machine_mode);
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extern int hard_reg_operand (rtx, enum machine_mode);
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extern int soft_reg_operand (rtx, enum machine_mode);
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extern int reg_or_some_mem_operand (rtx, enum machine_mode);
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#if defined TREE_CODE
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extern void m68hc11_init_cumulative_args (CUMULATIVE_ARGS*, tree, rtx);
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@ -72,7 +72,6 @@ static int m68hc11_address_cost (rtx);
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static int m68hc11_shift_cost (enum machine_mode, rtx, int);
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static int m68hc11_rtx_costs_1 (rtx, enum rtx_code, enum rtx_code);
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static bool m68hc11_rtx_costs (rtx, int, int, int *);
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static int m68hc11_auto_inc_p (rtx);
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static tree m68hc11_handle_fntype_attribute (tree *, tree, tree, int, bool *);
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const struct attribute_spec m68hc11_attribute_table[];
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@ -957,7 +956,7 @@ m68hc11_emit_libcall (const char *name, enum rtx_code code,
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/* Returns true if X is a PRE/POST increment decrement
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(same as auto_inc_p() in rtlanal.c but do not take into
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account the stack). */
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static int
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int
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m68hc11_auto_inc_p (rtx x)
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{
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return GET_CODE (x) == PRE_DEC
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@ -979,81 +978,6 @@ memory_reload_operand (rtx operand, enum machine_mode mode ATTRIBUTE_UNUSED)
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&& GET_CODE (XEXP (XEXP (operand, 0), 0)) == CONST_INT));
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}
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int
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tst_operand (rtx operand, enum machine_mode mode)
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{
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if (GET_CODE (operand) == MEM && reload_completed == 0)
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{
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rtx addr = XEXP (operand, 0);
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if (m68hc11_auto_inc_p (addr))
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return 0;
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}
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return nonimmediate_operand (operand, mode);
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}
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int
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cmp_operand (rtx operand, enum machine_mode mode)
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{
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if (GET_CODE (operand) == MEM)
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{
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rtx addr = XEXP (operand, 0);
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if (m68hc11_auto_inc_p (addr))
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return 0;
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}
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return general_operand (operand, mode);
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}
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int
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non_push_operand (rtx operand, enum machine_mode mode)
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{
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if (general_operand (operand, mode) == 0)
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return 0;
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if (push_operand (operand, mode) == 1)
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return 0;
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return 1;
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}
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int
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splitable_operand (rtx operand, enum machine_mode mode)
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{
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if (general_operand (operand, mode) == 0)
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return 0;
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if (push_operand (operand, mode) == 1)
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return 0;
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/* Reject a (MEM (MEM X)) because the patterns that use non_push_operand
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need to split such addresses to access the low and high part but it
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is not possible to express a valid address for the low part. */
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if (mode != QImode && GET_CODE (operand) == MEM
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&& GET_CODE (XEXP (operand, 0)) == MEM)
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return 0;
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return 1;
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}
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int
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reg_or_some_mem_operand (rtx operand, enum machine_mode mode)
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{
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if (GET_CODE (operand) == MEM)
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{
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rtx op = XEXP (operand, 0);
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if (symbolic_memory_operand (op, mode))
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return 1;
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if (IS_STACK_PUSH (operand))
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return 1;
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if (m68hc11_register_indirect_p (operand, mode))
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return 1;
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return 0;
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}
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return register_operand (operand, mode);
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}
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int
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m68hc11_symbolic_p (rtx operand, enum machine_mode mode)
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{
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@ -1091,56 +1015,6 @@ m68hc11_indirect_p (rtx operand, enum machine_mode mode)
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return 0;
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}
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int
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stack_register_operand (rtx operand, enum machine_mode mode ATTRIBUTE_UNUSED)
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{
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return SP_REG_P (operand);
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}
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int
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d_register_operand (rtx operand, enum machine_mode mode)
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{
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if (GET_MODE (operand) != mode && mode != VOIDmode)
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return 0;
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if (GET_CODE (operand) == SUBREG)
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operand = XEXP (operand, 0);
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return GET_CODE (operand) == REG
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&& (REGNO (operand) >= FIRST_PSEUDO_REGISTER
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|| REGNO (operand) == HARD_D_REGNUM
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|| (mode == QImode && REGNO (operand) == HARD_B_REGNUM));
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}
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int
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hard_addr_reg_operand (rtx operand, enum machine_mode mode)
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{
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if (GET_MODE (operand) != mode && mode != VOIDmode)
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return 0;
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if (GET_CODE (operand) == SUBREG)
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operand = XEXP (operand, 0);
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return GET_CODE (operand) == REG
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&& (REGNO (operand) == HARD_X_REGNUM
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|| REGNO (operand) == HARD_Y_REGNUM
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|| REGNO (operand) == HARD_Z_REGNUM);
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}
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int
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hard_reg_operand (rtx operand, enum machine_mode mode)
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{
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if (GET_MODE (operand) != mode && mode != VOIDmode)
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return 0;
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if (GET_CODE (operand) == SUBREG)
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operand = XEXP (operand, 0);
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return GET_CODE (operand) == REG
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&& (REGNO (operand) >= FIRST_PSEUDO_REGISTER
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|| H_REGNO_P (REGNO (operand)));
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}
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int
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memory_indexed_operand (rtx operand, enum machine_mode mode ATTRIBUTE_UNUSED)
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{
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@ -1201,51 +1075,6 @@ symbolic_memory_operand (rtx op, enum machine_mode mode)
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return 0;
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}
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}
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int
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m68hc11_eq_compare_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
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{
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return GET_CODE (op) == EQ || GET_CODE (op) == NE;
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}
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int
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m68hc11_logical_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
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{
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return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR;
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}
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int
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m68hc11_arith_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
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{
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return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR
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|| GET_CODE (op) == PLUS || GET_CODE (op) == MINUS
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|| GET_CODE (op) == ASHIFT || GET_CODE (op) == ASHIFTRT
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|| GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ROTATE
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|| GET_CODE (op) == ROTATERT;
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}
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int
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m68hc11_non_shift_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
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{
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return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR
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|| GET_CODE (op) == PLUS || GET_CODE (op) == MINUS;
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}
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/* Return true if op is a shift operator. */
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int
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m68hc11_shift_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
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{
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return GET_CODE (op) == ROTATE || GET_CODE (op) == ROTATERT
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|| GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFT
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|| GET_CODE (op) == ASHIFTRT;
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}
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int
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m68hc11_unary_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
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{
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return GET_CODE (op) == NEG || GET_CODE (op) == NOT
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|| GET_CODE (op) == SIGN_EXTEND || GET_CODE (op) == ZERO_EXTEND;
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}
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/* Emit the code to build the trampoline used to call a nested function.
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@ -1,6 +1,7 @@
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/* Definitions of target machine for GNU compiler.
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Motorola 68HC11 and 68HC12.
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
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Free Software Foundation, Inc.
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Contributed by Stephane Carrez (stcarrez@nerim.fr)
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This file is part of GCC.
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@ -1589,27 +1590,6 @@ do { \
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/* Miscellaneous Parameters. */
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/* Define the codes that are matched by predicates in m68hc11.c. */
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#define PREDICATE_CODES \
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{"stack_register_operand", {SUBREG, REG}}, \
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{"d_register_operand", {SUBREG, REG}}, \
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{"hard_addr_reg_operand", {SUBREG, REG}}, \
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{"hard_reg_operand", {SUBREG, REG}}, \
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{"m68hc11_logical_operator", {AND, IOR, XOR}}, \
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{"m68hc11_arith_operator", {AND, IOR, XOR, PLUS, MINUS, \
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ASHIFT, ASHIFTRT, LSHIFTRT, \
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ROTATE, ROTATERT }}, \
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{"m68hc11_non_shift_operator", {AND, IOR, XOR, PLUS, MINUS}}, \
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{"m68hc11_unary_operator", {NEG, NOT, SIGN_EXTEND, ZERO_EXTEND}}, \
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{"m68hc11_shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT, ROTATE, ROTATERT}},\
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{"m68hc11_eq_compare_operator", {EQ, NE}}, \
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{"non_push_operand", {SUBREG, REG, MEM}}, \
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{"splitable_operand", {SUBREG, REG, MEM}}, \
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{"reg_or_some_mem_operand", {SUBREG, REG, MEM}}, \
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{"tst_operand", {SUBREG, REG, MEM}}, \
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{"cmp_operand", {SUBREG, REG, MEM, SYMBOL_REF, LABEL_REF, \
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CONST_INT, CONST_DOUBLE}},
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/* Specify the machine mode that this machine uses
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for the index in the tablejump instruction. */
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#define CASE_VECTOR_MODE Pmode
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@ -1,5 +1,5 @@
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;;- Machine description file for Motorola 68HC11 and 68HC12.
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;;- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
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;;- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
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;;- Free Software Foundation, Inc.
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;;- Contributed by Stephane Carrez (stcarrez@nerim.fr)
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@ -149,6 +149,8 @@
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(SOFT_XY_REGNUM 12) ; XY soft register
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])
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(include "predicates.md")
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;;--------------------------------------------------------------------
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;;- Test
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;;--------------------------------------------------------------------
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218
gcc/config/m68hc11/predicates.md
Normal file
218
gcc/config/m68hc11/predicates.md
Normal file
@ -0,0 +1,218 @@
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;; Predicate definitions for Motorola 68HC11 and 68HC12.
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;; Copyright (C) 2005 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 2, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
|
||||
;; along with GCC; see the file COPYING. If not, write to
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;; the Free Software Foundation, 59 Temple Place - Suite 330,
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;; Boston, MA 02111-1307, USA.
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;; TODO: Add a comment here.
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(define_predicate "stack_register_operand"
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(match_code "subreg,reg")
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{
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return SP_REG_P (op);
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})
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;; TODO: Add a comment here.
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(define_predicate "d_register_operand"
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(match_code "subreg,reg")
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{
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if (GET_MODE (op) != mode && mode != VOIDmode)
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return 0;
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if (GET_CODE (op) == SUBREG)
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op = XEXP (op, 0);
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return GET_CODE (op) == REG
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&& (REGNO (op) >= FIRST_PSEUDO_REGISTER
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|| REGNO (op) == HARD_D_REGNUM
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|| (mode == QImode && REGNO (op) == HARD_B_REGNUM));
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})
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;; TODO: Add a comment here.
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(define_predicate "hard_addr_reg_operand"
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(match_code "subreg,reg")
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{
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if (GET_MODE (op) != mode && mode != VOIDmode)
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return 0;
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if (GET_CODE (op) == SUBREG)
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op = XEXP (op, 0);
|
||||
|
||||
return GET_CODE (op) == REG
|
||||
&& (REGNO (op) == HARD_X_REGNUM
|
||||
|| REGNO (op) == HARD_Y_REGNUM
|
||||
|| REGNO (op) == HARD_Z_REGNUM);
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "hard_reg_operand"
|
||||
(match_code "subreg,reg")
|
||||
{
|
||||
if (GET_MODE (op) != mode && mode != VOIDmode)
|
||||
return 0;
|
||||
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = XEXP (op, 0);
|
||||
|
||||
return GET_CODE (op) == REG
|
||||
&& (REGNO (op) >= FIRST_PSEUDO_REGISTER
|
||||
|| H_REGNO_P (REGNO (op)));
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "m68hc11_logical_operator"
|
||||
(match_code "and,ior,xor")
|
||||
{
|
||||
return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR;
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "m68hc11_arith_operator"
|
||||
(match_code "and,ior,xor,plus,minus,ashift,ashiftrt,lshiftrt,rotate,rotatert")
|
||||
{
|
||||
return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR
|
||||
|| GET_CODE (op) == PLUS || GET_CODE (op) == MINUS
|
||||
|| GET_CODE (op) == ASHIFT || GET_CODE (op) == ASHIFTRT
|
||||
|| GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ROTATE
|
||||
|| GET_CODE (op) == ROTATERT;
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "m68hc11_non_shift_operator"
|
||||
(match_code "and,ior,xor,plus,minus")
|
||||
{
|
||||
return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR
|
||||
|| GET_CODE (op) == PLUS || GET_CODE (op) == MINUS;
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "m68hc11_unary_operator"
|
||||
(match_code "neg,not,sign_extend,zero_extend")
|
||||
{
|
||||
return GET_CODE (op) == NEG || GET_CODE (op) == NOT
|
||||
|| GET_CODE (op) == SIGN_EXTEND || GET_CODE (op) == ZERO_EXTEND;
|
||||
})
|
||||
|
||||
;; Return true if op is a shift operator.
|
||||
|
||||
(define_predicate "m68hc11_shift_operator"
|
||||
(match_code "ashift,ashiftrt,lshiftrt,rotate,rotatert")
|
||||
{
|
||||
return GET_CODE (op) == ROTATE || GET_CODE (op) == ROTATERT
|
||||
|| GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFT
|
||||
|| GET_CODE (op) == ASHIFTRT;
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "m68hc11_eq_compare_operator"
|
||||
(match_code "eq,ne")
|
||||
{
|
||||
return GET_CODE (op) == EQ || GET_CODE (op) == NE;
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "non_push_operand"
|
||||
(match_code "subreg,reg,mem")
|
||||
{
|
||||
if (general_operand (op, mode) == 0)
|
||||
return 0;
|
||||
|
||||
if (push_operand (op, mode) == 1)
|
||||
return 0;
|
||||
return 1;
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "splitable_operand"
|
||||
(match_code "subreg,reg,mem")
|
||||
{
|
||||
if (general_operand (op, mode) == 0)
|
||||
return 0;
|
||||
|
||||
if (push_operand (op, mode) == 1)
|
||||
return 0;
|
||||
|
||||
/* Reject a (MEM (MEM X)) because the patterns that use non_push_operand
|
||||
need to split such addresses to access the low and high part but it
|
||||
is not possible to express a valid address for the low part. */
|
||||
if (mode != QImode && GET_CODE (op) == MEM
|
||||
&& GET_CODE (XEXP (op, 0)) == MEM)
|
||||
return 0;
|
||||
return 1;
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "reg_or_some_mem_operand"
|
||||
(match_code "subreg,reg,mem")
|
||||
{
|
||||
if (GET_CODE (op) == MEM)
|
||||
{
|
||||
rtx op0 = XEXP (op, 0);
|
||||
|
||||
if (symbolic_memory_operand (op0, mode))
|
||||
return 1;
|
||||
|
||||
if (IS_STACK_PUSH (op))
|
||||
return 1;
|
||||
|
||||
if (m68hc11_register_indirect_p (op, mode))
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
return register_operand (op, mode);
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "tst_operand"
|
||||
(match_code "subreg,reg,mem")
|
||||
{
|
||||
if (GET_CODE (op) == MEM && reload_completed == 0)
|
||||
{
|
||||
rtx addr = XEXP (op, 0);
|
||||
if (m68hc11_auto_inc_p (addr))
|
||||
return 0;
|
||||
}
|
||||
return nonimmediate_operand (op, mode);
|
||||
})
|
||||
|
||||
;; TODO: Add a comment here.
|
||||
|
||||
(define_predicate "cmp_operand"
|
||||
(match_code "subreg,reg,mem,symbol_ref,label_ref,const_int,const_double")
|
||||
{
|
||||
if (GET_CODE (op) == MEM)
|
||||
{
|
||||
rtx addr = XEXP (op, 0);
|
||||
if (m68hc11_auto_inc_p (addr))
|
||||
return 0;
|
||||
}
|
||||
return general_operand (op, mode);
|
||||
})
|
||||
Loading…
Reference in New Issue
Block a user