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libatomic: Provide FPU exception defines for __hppa__
The exception defines in <fenv.h> do not match the exception bits in the FPU status register on hppa-linux and hppa64-hpux11.11. On linux, they match the trap enable bits. On 64-bit hpux, they match the exception bits for IA64. The IA64 bits are in a different order and location than HPPA. HP uses table look ups to reorder the bits in code to test and raise exceptions. All the architectures that I looked at just pass the FPU status register to __atomic_feraiseexcept(). The simplest approach for hppa is to define FE_INEXACT, etc, to match the status register and not include <fenv.h>.. 2024-02-03 John David Anglin <danglin@gcc.gnu.org> libatomic/ChangeLog: PR target/59778 * configure.tgt (hppa*): Set ARCH. * config/pa/fenv.c: New file.
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libatomic/config/pa/fenv.c
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libatomic/config/pa/fenv.c
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/* Copyright (C) 2012-2024 Free Software Foundation, Inc.
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This file is part of the GNU Atomic Library (libatomic).
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Libatomic is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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Libatomic is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "libatomic_i.h"
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#define FE_INEXACT (1<<27)
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#define FE_UNDERFLOW (1<<28)
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#define FE_OVERFLOW (1<<29)
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#define FE_DIVBYZERO (1<<30)
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#define FE_INVALID (1<<31)
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/* Raise the supported floating-point exceptions from EXCEPTS. Other
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bits in EXCEPTS are ignored. */
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void
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__atomic_feraiseexcept (int excepts __attribute__ ((unused)))
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{
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volatile float r __attribute__ ((unused));
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#ifdef FE_INVALID
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if (excepts & FE_INVALID)
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{
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volatile float zero = 0.0f;
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r = zero / zero;
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}
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#endif
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#ifdef FE_DIVBYZERO
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if (excepts & FE_DIVBYZERO)
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{
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volatile float zero = 0.0f;
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r = 1.0f / zero;
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}
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#endif
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#ifdef FE_OVERFLOW
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if (excepts & FE_OVERFLOW)
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{
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volatile float max = __FLT_MAX__;
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r = max * max;
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}
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#endif
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#ifdef FE_UNDERFLOW
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if (excepts & FE_UNDERFLOW)
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{
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volatile float min = __FLT_MIN__;
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r = min * min;
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}
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#endif
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#ifdef FE_INEXACT
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if (excepts & FE_INEXACT)
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{
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volatile float three = 3.0f;
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r = 1.0f / three;
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}
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#endif
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}
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@ -36,6 +36,7 @@ case "${target_cpu}" in
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XCFLAGS="${XCFLAGS} -mfp-trap-mode=sui"
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ARCH=alpha
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;;
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hppa*) ARCH=pa ;;
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rs6000 | powerpc*) ARCH=powerpc ;;
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riscv*) ARCH=riscv ;;
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sh*) ARCH=sh ;;
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