libatomic: Provide FPU exception defines for __hppa__

The exception defines in <fenv.h> do not match the exception bits
in the FPU status register on hppa-linux and hppa64-hpux11.11.  On
linux, they match the trap enable bits.  On 64-bit hpux, they match
the exception bits for IA64.  The IA64 bits are in a different
order and location than HPPA.  HP uses table look ups to reorder
the bits in code to test and raise exceptions.

All the architectures that I looked at just pass the FPU status
register to __atomic_feraiseexcept().  The simplest approach for
hppa is to define FE_INEXACT, etc, to match the status register
and not include <fenv.h>..

2024-02-03  John David Anglin  <danglin@gcc.gnu.org>

libatomic/ChangeLog:

	PR target/59778
	* configure.tgt (hppa*): Set ARCH.
	* config/pa/fenv.c: New file.
This commit is contained in:
John David Anglin 2024-02-03 15:43:00 +00:00
parent 78005c6489
commit 266354012e
2 changed files with 75 additions and 0 deletions

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@ -0,0 +1,74 @@
/* Copyright (C) 2012-2024 Free Software Foundation, Inc.
This file is part of the GNU Atomic Library (libatomic).
Libatomic is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
Libatomic is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#include "libatomic_i.h"
#define FE_INEXACT (1<<27)
#define FE_UNDERFLOW (1<<28)
#define FE_OVERFLOW (1<<29)
#define FE_DIVBYZERO (1<<30)
#define FE_INVALID (1<<31)
/* Raise the supported floating-point exceptions from EXCEPTS. Other
bits in EXCEPTS are ignored. */
void
__atomic_feraiseexcept (int excepts __attribute__ ((unused)))
{
volatile float r __attribute__ ((unused));
#ifdef FE_INVALID
if (excepts & FE_INVALID)
{
volatile float zero = 0.0f;
r = zero / zero;
}
#endif
#ifdef FE_DIVBYZERO
if (excepts & FE_DIVBYZERO)
{
volatile float zero = 0.0f;
r = 1.0f / zero;
}
#endif
#ifdef FE_OVERFLOW
if (excepts & FE_OVERFLOW)
{
volatile float max = __FLT_MAX__;
r = max * max;
}
#endif
#ifdef FE_UNDERFLOW
if (excepts & FE_UNDERFLOW)
{
volatile float min = __FLT_MIN__;
r = min * min;
}
#endif
#ifdef FE_INEXACT
if (excepts & FE_INEXACT)
{
volatile float three = 3.0f;
r = 1.0f / three;
}
#endif
}

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@ -36,6 +36,7 @@ case "${target_cpu}" in
XCFLAGS="${XCFLAGS} -mfp-trap-mode=sui"
ARCH=alpha
;;
hppa*) ARCH=pa ;;
rs6000 | powerpc*) ARCH=powerpc ;;
riscv*) ARCH=riscv ;;
sh*) ARCH=sh ;;