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[RISC-V] [PATCH v2] Enable inlining str* by default
So with Chrstoph's patches from late 2022 we've had the ability to inline strlen, and str[n]cmp (scalar). However, we never actually turned this capability on by default! This patch flips the those default to allow inlinining by default. It also fixes one bug exposed by our internal testing when NBYTES is zero for strncmp. I don't think that case happens enough to try and optimize it, we just disable inline expansion for that instance. This has been bootstrapped and regression tested on rv64gc at various times as well as cross tested on rv64gc more times than I can probably count (we've have this patch internally for a while). More importantly, I just successfully tested it on rv64gc and rv32gcv elf configurations with the trunk gcc/ * config/riscv/riscv-string.cc (riscv_expand_strcmp): Do not inline strncmp with zero size. (emit_strcmp_scalar_compare_subword): Adjust rotation for rv32 vs rv64. * config/riscv/riscv.opt (var_inline_strcmp): Enable by default. (vriscv_inline_strncmp, riscv_inline_strlen): Likewise. gcc/testsuite * gcc.target/riscv/zbb-strlen-disabled-2.c: Turn off inlining.
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@ -153,7 +153,7 @@ emit_strcmp_scalar_compare_subword (rtx data1, rtx data2, rtx orc1,
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rtx imask = gen_rtx_CONST_INT (Xmode, im);
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rtx m_reg = gen_reg_rtx (Xmode);
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emit_insn (gen_rtx_SET (m_reg, imask));
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do_rotr3 (m_reg, m_reg, GEN_INT (64 - cmp_bytes * BITS_PER_UNIT));
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do_rotr3 (m_reg, m_reg, GEN_INT (BITS_PER_WORD - cmp_bytes * BITS_PER_UNIT));
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do_and3 (data1, m_reg, data1);
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do_and3 (data2, m_reg, data2);
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if (TARGET_ZBB)
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@ -497,6 +497,13 @@ riscv_expand_strcmp (rtx result, rtx src1, rtx src2,
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return false;
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nbytes = UINTVAL (bytes_rtx);
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/* If NBYTES is zero the result of strncmp will always be zero,
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but that would require special casing in the caller. So for
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now just don't do an inline expansion. This probably rarely
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happens in practice, but it is tested by the testsuite. */
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if (nbytes == 0)
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return false;
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/* We don't emit parts of a strncmp() call. */
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if (nbytes > compare_max)
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return false;
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@ -517,15 +517,15 @@ Target Var(TARGET_INLINE_SUBWORD_ATOMIC) Init(1)
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Always inline subword atomic operations.
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minline-strcmp
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Target Var(riscv_inline_strcmp) Init(0)
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Target Var(riscv_inline_strcmp) Init(1)
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Inline strcmp calls if possible.
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minline-strncmp
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Target Var(riscv_inline_strncmp) Init(0)
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Target Var(riscv_inline_strncmp) Init(1)
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Inline strncmp calls if possible.
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minline-strlen
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Target Var(riscv_inline_strlen) Init(0)
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Target Var(riscv_inline_strlen) Init(1)
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Inline strlen calls if possible.
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-param=riscv-strcmp-inline-limit=
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@ -1,6 +1,6 @@
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/* { dg-do compile } */
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/* { dg-options "-march=rv32gc_zbb" { target { rv32 } } } */
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/* { dg-options "-march=rv64gc_zbb" { target { rv64 } } } */
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/* { dg-options "-mno-inline-strlen -march=rv32gc_zbb" { target { rv32 } } } */
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/* { dg-options "-mno-inline-strlen -march=rv64gc_zbb" { target { rv64 } } } */
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/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
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typedef long unsigned int size_t;
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