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SVE intrinsics: Fold svmul with all-zero operands to zero vector
As recently implemented for svdiv, this patch folds svmul to a zero vector if one of the operands is a zero vector. This transformation is applied if at least one of the following conditions is met: - the first operand is all zeros or - the second operand is all zeros, and the predicate is ptrue or the predication is _x or _z. In contrast to constant folding, which was implemented in a previous patch, this transformation is applied as soon as one of the operands is a zero vector, while the other operand can be a variable. The patch was bootstrapped and regtested on aarch64-linux-gnu, no regression. OK for mainline? Signed-off-by: Jennifer Schmitz <jschmitz@nvidia.com> gcc/ * config/aarch64/aarch64-sve-builtins-base.cc (svmul_impl::fold): Add folding of all-zero operands to zero vector. gcc/testsuite/ * gcc.target/aarch64/sve/const_fold_mul_1.c: Adjust expected outcome. * gcc.target/aarch64/sve/fold_mul_zero.c: New test.
This commit is contained in:
Jennifer Schmitz
parent
9a99559a47
commit
08aba2dd8c
@ -2020,7 +2020,22 @@ public:
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gimple *
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fold (gimple_folder &f) const override
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{
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return f.fold_const_binary (MULT_EXPR);
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if (auto *res = f.fold_const_binary (MULT_EXPR))
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return res;
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/* If one of the operands is all zeros, fold to zero vector. */
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tree op1 = gimple_call_arg (f.call, 1);
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if (integer_zerop (op1))
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return gimple_build_assign (f.lhs, op1);
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tree pg = gimple_call_arg (f.call, 0);
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tree op2 = gimple_call_arg (f.call, 2);
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if (integer_zerop (op2)
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&& (f.pred != PRED_m
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|| is_ptrue (pg, f.type_suffix (0).element_bytes)))
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return gimple_build_assign (f.lhs, build_zero_cst (TREE_TYPE (f.lhs)));
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return NULL;
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}
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};
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@ -35,7 +35,7 @@ svint64_t s64_z_pg (svbool_t pg)
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/*
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** s64_z_pg_0:
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** mov z[0-9]+\.d, p[0-7]/z, #0
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_z_pg_0 (svbool_t pg)
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@ -117,7 +117,7 @@ svint64_t s64_z_pg_n (svbool_t pg)
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/*
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** s64_z_pg_n_s64_0:
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** mov z[0-9]+\.d, p[0-7]/z, #0
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_z_pg_n_s64_0 (svbool_t pg)
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365
gcc/testsuite/gcc.target/aarch64/sve/fold_mul_zero.c
Normal file
365
gcc/testsuite/gcc.target/aarch64/sve/fold_mul_zero.c
Normal file
@ -0,0 +1,365 @@
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/* { dg-final { check-function-bodies "**" "" } } */
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/* { dg-options "-O2" } */
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#include "arm_sve.h"
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/*
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** s64_x_pg_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_x_pg_op1 (svbool_t pg, svint64_t op2)
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{
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return svmul_x (pg, svdup_s64 (0), op2);
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}
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/*
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** s64_z_pg_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_z_pg_op1 (svbool_t pg, svint64_t op2)
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{
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return svmul_z (pg, svdup_s64 (0), op2);
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}
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/*
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** s64_m_pg_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_m_pg_op1 (svbool_t pg, svint64_t op2)
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{
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return svmul_m (pg, svdup_s64 (0), op2);
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}
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/*
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** s64_x_ptrue_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_x_ptrue_op1 (svint64_t op2)
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{
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return svmul_x (svptrue_b64 (), svdup_s64 (0), op2);
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}
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/*
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** s64_z_ptrue_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_z_ptrue_op1 (svint64_t op2)
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{
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return svmul_z (svptrue_b64 (), svdup_s64 (0), op2);
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}
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/*
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** s64_m_ptrue_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_m_ptrue_op1 (svint64_t op2)
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{
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return svmul_m (svptrue_b64 (), svdup_s64 (0), op2);
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}
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/*
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** s64_x_pg_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_x_pg_op2 (svbool_t pg, svint64_t op1)
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{
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return svmul_x (pg, op1, svdup_s64 (0));
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}
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/*
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** s64_z_pg_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_z_pg_op2 (svbool_t pg, svint64_t op1)
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{
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return svmul_z (pg, op1, svdup_s64 (0));
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}
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/*
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** s64_m_pg_op2:
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** mov z[0-9]+\.d, p0/m, #0
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** ret
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*/
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svint64_t s64_m_pg_op2 (svbool_t pg, svint64_t op1)
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{
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return svmul_m (pg, op1, svdup_s64 (0));
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}
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/*
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** s64_x_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_x_ptrue_op2 (svint64_t op1)
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{
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return svmul_x (svptrue_b64 (), op1, svdup_s64 (0));
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}
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/*
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** s64_z_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_z_ptrue_op2 (svint64_t op1)
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{
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return svmul_z (svptrue_b64 (), op1, svdup_s64 (0));
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}
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/*
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** s64_m_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_m_ptrue_op2 (svint64_t op1)
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{
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return svmul_m (svptrue_b64 (), op1, svdup_s64 (0));
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}
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/*
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** s64_n_x_pg_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_n_x_pg_op2 (svbool_t pg, svint64_t op1)
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{
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return svmul_n_s64_x (pg, op1, 0);
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}
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/*
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** s64_n_z_pg_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_n_z_pg_op2 (svbool_t pg, svint64_t op1)
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{
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return svmul_n_s64_z (pg, op1, 0);
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}
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/*
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** s64_n_m_pg_op2:
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** mov z[0-9]+\.d, p0/m, #0
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** ret
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*/
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svint64_t s64_n_m_pg_op2 (svbool_t pg, svint64_t op1)
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{
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return svmul_n_s64_m (pg, op1, 0);
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}
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/*
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** s64_n_x_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_n_x_ptrue_op2 (svint64_t op1)
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{
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return svmul_n_s64_x (svptrue_b64 (), op1, 0);
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}
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/*
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** s64_n_z_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_n_z_ptrue_op2 (svint64_t op1)
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{
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return svmul_n_s64_z (svptrue_b64 (), op1, 0);
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}
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/*
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** s64_n_m_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svint64_t s64_n_m_ptrue_op2 (svint64_t op1)
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{
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return svmul_n_s64_m (svptrue_b64 (), op1, 0);
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}
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/*
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** u64_x_pg_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_x_pg_op1 (svbool_t pg, svuint64_t op2)
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{
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return svmul_x (pg, svdup_u64 (0), op2);
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}
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/*
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** u64_z_pg_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_z_pg_op1 (svbool_t pg, svuint64_t op2)
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{
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return svmul_z (pg, svdup_u64 (0), op2);
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}
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/*
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** u64_m_pg_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_m_pg_op1 (svbool_t pg, svuint64_t op2)
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{
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return svmul_m (pg, svdup_u64 (0), op2);
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}
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/*
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** u64_x_ptrue_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_x_ptrue_op1 (svuint64_t op2)
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{
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return svmul_x (svptrue_b64 (), svdup_u64 (0), op2);
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}
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/*
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** u64_z_ptrue_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_z_ptrue_op1 (svuint64_t op2)
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{
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return svmul_z (svptrue_b64 (), svdup_u64 (0), op2);
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}
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/*
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** u64_m_ptrue_op1:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_m_ptrue_op1 (svuint64_t op2)
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{
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return svmul_m (svptrue_b64 (), svdup_u64 (0), op2);
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}
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/*
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** u64_x_pg_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_x_pg_op2 (svbool_t pg, svuint64_t op1)
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{
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return svmul_x (pg, op1, svdup_u64 (0));
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}
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/*
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** u64_z_pg_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_z_pg_op2 (svbool_t pg, svuint64_t op1)
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{
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return svmul_z (pg, op1, svdup_u64 (0));
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}
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/*
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** u64_m_pg_op2:
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** mov z[0-9]+\.d, p0/m, #0
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** ret
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*/
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svuint64_t u64_m_pg_op2 (svbool_t pg, svuint64_t op1)
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{
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return svmul_m (pg, op1, svdup_u64 (0));
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}
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/*
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** u64_x_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_x_ptrue_op2 (svuint64_t op1)
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{
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return svmul_x (svptrue_b64 (), op1, svdup_u64 (0));
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}
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/*
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** u64_z_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_z_ptrue_op2 (svuint64_t op1)
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{
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return svmul_z (svptrue_b64 (), op1, svdup_u64 (0));
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}
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/*
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** u64_m_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_m_ptrue_op2 (svuint64_t op1)
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{
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return svmul_m (svptrue_b64 (), op1, svdup_u64 (0));
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}
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/*
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** u64_n_x_pg_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_n_x_pg_op2 (svbool_t pg, svuint64_t op1)
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{
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return svmul_n_u64_x (pg, op1, 0);
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}
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/*
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** u64_n_z_pg_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_n_z_pg_op2 (svbool_t pg, svuint64_t op1)
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{
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return svmul_n_u64_z (pg, op1, 0);
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}
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/*
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** u64_n_m_pg_op2:
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** mov z[0-9]+\.d, p0/m, #0
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** ret
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*/
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svuint64_t u64_n_m_pg_op2 (svbool_t pg, svuint64_t op1)
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{
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return svmul_n_u64_m (pg, op1, 0);
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}
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/*
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** u64_n_x_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_n_x_ptrue_op2 (svuint64_t op1)
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{
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return svmul_n_u64_x (svptrue_b64 (), op1, 0);
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}
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/*
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** u64_n_z_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_n_z_ptrue_op2 (svuint64_t op1)
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{
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return svmul_n_u64_z (svptrue_b64 (), op1, 0);
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}
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/*
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** u64_n_m_ptrue_op2:
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** mov z[0-9]+\.b, #0
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** ret
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*/
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svuint64_t u64_n_m_ptrue_op2 (svuint64_t op1)
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{
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return svmul_n_u64_m (svptrue_b64 (), op1, 0);
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}
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