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3d4c5207d1
PR-URL: https://github.com/nodejs/node/pull/52516 Reviewed-By: Marco Ippolito <marcoippolito54@gmail.com> Reviewed-By: Mohammed Keyvanzadeh <mohammadkeyvanzade94@gmail.com> Reviewed-By: Luigi Pinca <luigipinca@gmail.com>
457 lines
14 KiB
C
457 lines
14 KiB
C
/* adler32_simd.c
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*
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* Copyright 2017 The Chromium Authors
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* Use of this source code is governed by a BSD-style license that can be
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* found in the Chromium source repository LICENSE file.
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*
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* Per http://en.wikipedia.org/wiki/Adler-32 the adler32 A value (aka s1) is
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* the sum of N input data bytes D1 ... DN,
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*
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* A = A0 + D1 + D2 + ... + DN
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*
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* where A0 is the initial value.
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*
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* SSE2 _mm_sad_epu8() can be used for byte sums (see http://bit.ly/2wpUOeD,
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* for example) and accumulating the byte sums can use SSE shuffle-adds (see
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* the "Integer" section of http://bit.ly/2erPT8t for details). Arm NEON has
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* similar instructions.
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*
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* The adler32 B value (aka s2) sums the A values from each step:
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*
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* B0 + (A0 + D1) + (A0 + D1 + D2) + ... + (A0 + D1 + D2 + ... + DN) or
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*
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* B0 + N.A0 + N.D1 + (N-1).D2 + (N-2).D3 + ... + (N-(N-1)).DN
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*
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* B0 being the initial value. For 32 bytes (ideal for garden-variety SIMD):
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*
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* B = B0 + 32.A0 + [D1 D2 D3 ... D32] x [32 31 30 ... 1].
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*
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* Adjacent blocks of 32 input bytes can be iterated with the expressions to
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* compute the adler32 s1 s2 of M >> 32 input bytes [1].
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*
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* As M grows, the s1 s2 sums grow. If left unchecked, they would eventually
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* overflow the precision of their integer representation (bad). However, s1
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* and s2 also need to be computed modulo the adler BASE value (reduced). If
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* at most NMAX bytes are processed before a reduce, s1 s2 _cannot_ overflow
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* a uint32_t type (the NMAX constraint) [2].
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*
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* [1] the iterative equations for s2 contain constant factors; these can be
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* hoisted from the n-blocks do loop of the SIMD code.
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*
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* [2] zlib adler32_z() uses this fact to implement NMAX-block-based updates
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* of the adler s1 s2 of uint32_t type (see adler32.c).
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*/
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#include "adler32_simd.h"
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/* Definitions from adler32.c: largest prime smaller than 65536 */
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#define BASE 65521U
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/* NMAX is the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1 */
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#define NMAX 5552
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#if defined(ADLER32_SIMD_SSSE3)
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#include <tmmintrin.h>
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uint32_t ZLIB_INTERNAL adler32_simd_( /* SSSE3 */
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uint32_t adler,
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const unsigned char *buf,
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z_size_t len)
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{
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/*
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* Split Adler-32 into component sums.
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*/
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uint32_t s1 = adler & 0xffff;
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uint32_t s2 = adler >> 16;
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/*
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* Process the data in blocks.
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*/
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const unsigned BLOCK_SIZE = 1 << 5;
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z_size_t blocks = len / BLOCK_SIZE;
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len -= blocks * BLOCK_SIZE;
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while (blocks)
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{
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unsigned n = NMAX / BLOCK_SIZE; /* The NMAX constraint. */
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if (n > blocks)
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n = (unsigned) blocks;
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blocks -= n;
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const __m128i tap1 =
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_mm_setr_epi8(32,31,30,29,28,27,26,25,24,23,22,21,20,19,18,17);
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const __m128i tap2 =
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_mm_setr_epi8(16,15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1);
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const __m128i zero =
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_mm_setr_epi8( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
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const __m128i ones =
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_mm_set_epi16( 1, 1, 1, 1, 1, 1, 1, 1);
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/*
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* Process n blocks of data. At most NMAX data bytes can be
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* processed before s2 must be reduced modulo BASE.
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*/
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__m128i v_ps = _mm_set_epi32(0, 0, 0, s1 * n);
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__m128i v_s2 = _mm_set_epi32(0, 0, 0, s2);
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__m128i v_s1 = _mm_set_epi32(0, 0, 0, 0);
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do {
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/*
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* Load 32 input bytes.
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*/
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const __m128i bytes1 = _mm_loadu_si128((__m128i*)(buf));
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const __m128i bytes2 = _mm_loadu_si128((__m128i*)(buf + 16));
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/*
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* Add previous block byte sum to v_ps.
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*/
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v_ps = _mm_add_epi32(v_ps, v_s1);
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/*
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* Horizontally add the bytes for s1, multiply-adds the
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* bytes by [ 32, 31, 30, ... ] for s2.
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*/
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v_s1 = _mm_add_epi32(v_s1, _mm_sad_epu8(bytes1, zero));
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const __m128i mad1 = _mm_maddubs_epi16(bytes1, tap1);
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v_s2 = _mm_add_epi32(v_s2, _mm_madd_epi16(mad1, ones));
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v_s1 = _mm_add_epi32(v_s1, _mm_sad_epu8(bytes2, zero));
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const __m128i mad2 = _mm_maddubs_epi16(bytes2, tap2);
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v_s2 = _mm_add_epi32(v_s2, _mm_madd_epi16(mad2, ones));
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buf += BLOCK_SIZE;
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} while (--n);
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v_s2 = _mm_add_epi32(v_s2, _mm_slli_epi32(v_ps, 5));
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/*
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* Sum epi32 ints v_s1(s2) and accumulate in s1(s2).
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*/
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#define S23O1 _MM_SHUFFLE(2,3,0,1) /* A B C D -> B A D C */
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#define S1O32 _MM_SHUFFLE(1,0,3,2) /* A B C D -> C D A B */
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v_s1 = _mm_add_epi32(v_s1, _mm_shuffle_epi32(v_s1, S23O1));
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v_s1 = _mm_add_epi32(v_s1, _mm_shuffle_epi32(v_s1, S1O32));
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s1 += _mm_cvtsi128_si32(v_s1);
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v_s2 = _mm_add_epi32(v_s2, _mm_shuffle_epi32(v_s2, S23O1));
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v_s2 = _mm_add_epi32(v_s2, _mm_shuffle_epi32(v_s2, S1O32));
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s2 = _mm_cvtsi128_si32(v_s2);
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#undef S23O1
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#undef S1O32
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/*
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* Reduce.
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*/
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s1 %= BASE;
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s2 %= BASE;
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}
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/*
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* Handle leftover data.
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*/
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if (len) {
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if (len >= 16) {
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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len -= 16;
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}
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while (len--) {
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s2 += (s1 += *buf++);
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}
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if (s1 >= BASE)
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s1 -= BASE;
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s2 %= BASE;
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}
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/*
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* Return the recombined sums.
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*/
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return s1 | (s2 << 16);
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}
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#elif defined(ADLER32_SIMD_NEON)
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#include <arm_neon.h>
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uint32_t ZLIB_INTERNAL adler32_simd_( /* NEON */
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uint32_t adler,
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const unsigned char *buf,
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z_size_t len)
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{
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/*
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* Split Adler-32 into component sums.
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*/
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uint32_t s1 = adler & 0xffff;
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uint32_t s2 = adler >> 16;
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/*
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* Serially compute s1 & s2, until the data is 16-byte aligned.
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*/
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if ((uintptr_t)buf & 15) {
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while ((uintptr_t)buf & 15) {
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s2 += (s1 += *buf++);
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--len;
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}
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if (s1 >= BASE)
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s1 -= BASE;
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s2 %= BASE;
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}
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/*
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* Process the data in blocks.
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*/
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const unsigned BLOCK_SIZE = 1 << 5;
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z_size_t blocks = len / BLOCK_SIZE;
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len -= blocks * BLOCK_SIZE;
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while (blocks)
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{
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unsigned n = NMAX / BLOCK_SIZE; /* The NMAX constraint. */
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if (n > blocks)
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n = (unsigned) blocks;
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blocks -= n;
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/*
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* Process n blocks of data. At most NMAX data bytes can be
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* processed before s2 must be reduced modulo BASE.
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*/
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uint32x4_t v_s2 = (uint32x4_t) { 0, 0, 0, s1 * n };
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uint32x4_t v_s1 = (uint32x4_t) { 0, 0, 0, 0 };
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uint16x8_t v_column_sum_1 = vdupq_n_u16(0);
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uint16x8_t v_column_sum_2 = vdupq_n_u16(0);
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uint16x8_t v_column_sum_3 = vdupq_n_u16(0);
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uint16x8_t v_column_sum_4 = vdupq_n_u16(0);
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do {
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/*
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* Load 32 input bytes.
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*/
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const uint8x16_t bytes1 = vld1q_u8((uint8_t*)(buf));
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const uint8x16_t bytes2 = vld1q_u8((uint8_t*)(buf + 16));
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/*
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* Add previous block byte sum to v_s2.
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*/
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v_s2 = vaddq_u32(v_s2, v_s1);
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/*
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* Horizontally add the bytes for s1.
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*/
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v_s1 = vpadalq_u16(v_s1, vpadalq_u8(vpaddlq_u8(bytes1), bytes2));
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/*
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* Vertically add the bytes for s2.
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*/
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v_column_sum_1 = vaddw_u8(v_column_sum_1, vget_low_u8 (bytes1));
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v_column_sum_2 = vaddw_u8(v_column_sum_2, vget_high_u8(bytes1));
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v_column_sum_3 = vaddw_u8(v_column_sum_3, vget_low_u8 (bytes2));
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v_column_sum_4 = vaddw_u8(v_column_sum_4, vget_high_u8(bytes2));
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buf += BLOCK_SIZE;
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} while (--n);
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v_s2 = vshlq_n_u32(v_s2, 5);
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/*
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* Multiply-add bytes by [ 32, 31, 30, ... ] for s2.
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*/
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v_s2 = vmlal_u16(v_s2, vget_low_u16 (v_column_sum_1),
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(uint16x4_t) { 32, 31, 30, 29 });
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v_s2 = vmlal_u16(v_s2, vget_high_u16(v_column_sum_1),
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(uint16x4_t) { 28, 27, 26, 25 });
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v_s2 = vmlal_u16(v_s2, vget_low_u16 (v_column_sum_2),
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(uint16x4_t) { 24, 23, 22, 21 });
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v_s2 = vmlal_u16(v_s2, vget_high_u16(v_column_sum_2),
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(uint16x4_t) { 20, 19, 18, 17 });
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v_s2 = vmlal_u16(v_s2, vget_low_u16 (v_column_sum_3),
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(uint16x4_t) { 16, 15, 14, 13 });
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v_s2 = vmlal_u16(v_s2, vget_high_u16(v_column_sum_3),
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(uint16x4_t) { 12, 11, 10, 9 });
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v_s2 = vmlal_u16(v_s2, vget_low_u16 (v_column_sum_4),
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(uint16x4_t) { 8, 7, 6, 5 });
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v_s2 = vmlal_u16(v_s2, vget_high_u16(v_column_sum_4),
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(uint16x4_t) { 4, 3, 2, 1 });
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/*
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* Sum epi32 ints v_s1(s2) and accumulate in s1(s2).
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*/
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uint32x2_t sum1 = vpadd_u32(vget_low_u32(v_s1), vget_high_u32(v_s1));
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uint32x2_t sum2 = vpadd_u32(vget_low_u32(v_s2), vget_high_u32(v_s2));
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uint32x2_t s1s2 = vpadd_u32(sum1, sum2);
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s1 += vget_lane_u32(s1s2, 0);
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s2 += vget_lane_u32(s1s2, 1);
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/*
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* Reduce.
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*/
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s1 %= BASE;
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s2 %= BASE;
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}
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/*
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* Handle leftover data.
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*/
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if (len) {
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if (len >= 16) {
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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s2 += (s1 += *buf++);
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len -= 16;
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}
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while (len--) {
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s2 += (s1 += *buf++);
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}
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if (s1 >= BASE)
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s1 -= BASE;
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s2 %= BASE;
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}
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/*
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* Return the recombined sums.
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*/
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return s1 | (s2 << 16);
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}
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#elif defined(ADLER32_SIMD_RVV)
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#include <riscv_vector.h>
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/*
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* Patch by Simon Hosie, from:
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* https://github.com/cloudflare/zlib/pull/55
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*/
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uint32_t ZLIB_INTERNAL adler32_simd_( /* RVV */
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uint32_t adler,
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const unsigned char *buf,
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unsigned long len)
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{
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size_t vl = __riscv_vsetvlmax_e8m2();
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const vuint16m4_t zero16 = __riscv_vmv_v_x_u16m4(0, vl);
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vuint16m4_t a_sum = zero16;
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vuint32m8_t b_sum = __riscv_vmv_v_x_u32m8(0, vl);
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/* Deal with the part which is not a multiple of vl first; because it's
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* easier to zero-stuff the beginning of the checksum than it is to tweak the
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* multipliers and sums for odd lengths afterwards.
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*/
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size_t head = len & (vl - 1);
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if (head > 0) {
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vuint8m2_t zero8 = __riscv_vmv_v_x_u8m2(0, vl);
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vuint8m2_t in = __riscv_vle8_v_u8m2(buf, vl);
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in = __riscv_vslideup(zero8, in, vl - head, vl);
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vuint16m4_t in16 = __riscv_vwcvtu_x(in, vl);
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a_sum = in16;
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buf += head;
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}
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/* We have a 32-bit accumulator, and in each iteration we add 22-times a
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* 16-bit value, plus another 16-bit value. We periodically subtract up to
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* 65535 times BASE to avoid overflow. b_overflow estimates how often we
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* need to do this subtraction.
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*/
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const int b_overflow = BASE / 23;
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int fixup = b_overflow;
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ssize_t iters = (len - head) / vl;
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while (iters > 0) {
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const vuint16m4_t a_overflow = __riscv_vrsub(a_sum, BASE, vl);
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int batch = iters < 22 ? iters : 22;
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iters -= batch;
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b_sum = __riscv_vwmaccu(b_sum, batch, a_sum, vl);
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vuint16m4_t a_batch = zero16, b_batch = zero16;
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/* Do a short batch, where neither a_sum nor b_sum can overflow a 16-bit
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* register. Then add them back into the main accumulators.
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*/
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while (batch-- > 0) {
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vuint8m2_t in8 = __riscv_vle8_v_u8m2(buf, vl);
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buf += vl;
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b_batch = __riscv_vadd(b_batch, a_batch, vl);
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a_batch = __riscv_vwaddu_wv(a_batch, in8, vl);
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}
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vbool4_t ov = __riscv_vmsgeu(a_batch, a_overflow, vl);
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a_sum = __riscv_vadd(a_sum, a_batch, vl);
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a_sum = __riscv_vadd_mu(ov, a_sum, a_sum, 65536 - BASE, vl);
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b_sum = __riscv_vwaddu_wv(b_sum, b_batch, vl);
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if (--fixup <= 0) {
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b_sum = __riscv_vnmsac(b_sum, BASE, __riscv_vsrl(b_sum, 16, vl), vl);
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fixup = b_overflow;
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}
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}
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/* Adjust per-lane sums to have appropriate offsets from the end of the
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* buffer.
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*/
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const vuint16m4_t off = __riscv_vrsub(__riscv_vid_v_u16m4(vl), vl, vl);
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vuint16m4_t bsum16 = __riscv_vncvt_x(__riscv_vremu(b_sum, BASE, vl), vl);
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b_sum = __riscv_vadd(__riscv_vwmulu(a_sum, off, vl),
|
|
__riscv_vwmulu(bsum16, vl, vl), vl);
|
|
bsum16 = __riscv_vncvt_x(__riscv_vremu(b_sum, BASE, vl), vl);
|
|
|
|
/* And finally, do a horizontal sum across the registers for the final
|
|
* result.
|
|
*/
|
|
uint32_t a = adler & 0xffff;
|
|
uint32_t b = ((adler >> 16) + a * (len % BASE)) % BASE;
|
|
vuint32m1_t sca = __riscv_vmv_v_x_u32m1(a, 1);
|
|
vuint32m1_t scb = __riscv_vmv_v_x_u32m1(b, 1);
|
|
sca = __riscv_vwredsumu(a_sum, sca, vl);
|
|
scb = __riscv_vwredsumu(bsum16, scb, vl);
|
|
a = __riscv_vmv_x(sca);
|
|
b = __riscv_vmv_x(scb);
|
|
a %= BASE;
|
|
b %= BASE;
|
|
return (b << 16) | a;
|
|
}
|
|
|
|
#endif /* ADLER32_SIMD_SSSE3 */
|